paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-04-17 13:39:36 +02:00
Code Issues Packages Projects Releases Wiki Activity

+ $define newra will enable new register allocator

Browse Source 
+ getregisterint will return imaginary registers with $newra
  + -sr switch added, will skip register allocation so you can see
    the direct output of the code generator before register allocation
This commit is contained in:
daniel 2003-03-08 08:59:07 +00:00
parent b253f0b8a1
commit e8f649f5c2
13 changed files with 209 additions and 80 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
compiler/globtype.pas
View File

@ -68,8 +68,8 @@ interface
cs_load_objpas_unit,
cs_load_gpc_unit,
{ optimizer }
cs_regalloc,cs_uncertainopts,cs_littlesize,cs_optimize,
cs_fastoptimize, cs_slowoptimize,cs_align,
cs_regalloc,cs_no_regalloc,cs_uncertainopts,cs_littlesize,
cs_optimize,cs_fastoptimize,cs_slowoptimize,cs_align,
{ browser }
cs_browser_log,
{ debugger }
@ -211,7 +211,13 @@ implementation
end.
{
$Log$
Revision 1.34 2002-10-16 19:01:43 peter
Revision 1.35 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.34 2002/10/16 19:01:43 peter
+ $IMPLICITEXCEPTIONS switch to turn on/off generation of the
implicit exception frames for procedures with initialized variables
and for constructors. The default is on for compatibility

13
compiler/i386/aasmcpu.pas
View File

@ -769,11 +769,6 @@ implementation
{ we need ATT order }
SetOperandOrder(op_att);
if (oper[0].typ=top_reg) and (oper[0].reg.enum>lastreg) then
internalerror(200301081);
if (oper[1].typ=top_reg) and (oper[1].reg.enum>lastreg) then
internalerror(200301081);
if ((ops=2) and
(oper[0].typ=top_reg) and
(oper[1].typ=top_reg) and
@ -1949,7 +1944,13 @@ implementation
end.
{
$Log$
Revision 1.13 2003-02-25 07:41:54 daniel
Revision 1.14 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.13 2003/02/25 07:41:54 daniel
* Properly fixed reversed operands bug
Revision 1.12 2003/02/19 22:00:15 daniel

42
compiler/i386/ag386int.pas
View File

@ -99,6 +99,7 @@ interface
);
function intel_regnum_search(const s:string):Tnewregister;
function intel_regname(const r:Tnewregister):string;
implementation
@ -883,6 +884,39 @@ ait_stab_function_name : ;
intel_regnum_search:=NR_NO;
end;
function intel_regname(const r:Tnewregister):string;
var i:byte;
nr:string[3];
sub:char;
begin
intel_regname:='';
for i:=0 to regname_count-1 do
if r=intel_regname2regnum[i].number then
intel_regname:=intel_regname2regnum[i].name;
{If not found, generate a systematic name.}
if intel_regname='' then
begin
str(r shr 8,nr);
case r and $ff of
R_SUBL:
sub:='l';
R_SUBH:
sub:='h';
R_SUBW:
sub:='w';
R_SUBD:
sub:='d';
R_SUBQ:
sub:='q';
else
internalerror(200303081);
end;
intel_regname:='reg'+nr+sub;
end;
end;
{*****************************************************************************
Initialize
*****************************************************************************}
@ -932,7 +966,13 @@ initialization
end.
{
$Log$
Revision 1.33 2003-02-19 22:00:15 daniel
Revision 1.34 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.33 2003/02/19 22:00:15 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

54
compiler/i386/ag386nsm.pas
View File

@ -52,7 +52,7 @@ interface
sysutils,
{$endif}
cutils,globtype,globals,systems,cclasses,
fmodule,finput,verbose,cpuinfo
fmodule,finput,verbose,cpuinfo,ag386int
;
const
@ -217,41 +217,47 @@ interface
procedure T386NasmAssembler.WriteReference(var ref : treference);
var
first : boolean;
first,no_s,no_b,no_i : boolean;
begin
with ref do
begin
if segment.enum>lastreg then
internalerror(200301081);
if base.enum>lastreg then
internalerror(200301081);
if index.enum>lastreg then
internalerror(200301081);
no_s:=(segment.enum=R_NO) or ((segment.enum=R_INTREGISTER) and (segment.number=NR_NO));
no_b:=(base.enum=R_NO) or ((base.enum=R_INTREGISTER) and (base.number=NR_NO));
no_i:=(index.enum=R_NO) or ((index.enum=R_INTREGISTER) and (index.number=NR_NO));
AsmWrite('[');
first:=true;
inc(offset,offsetfixup);
offsetfixup:=0;
if segment.enum<>R_NO then
AsmWrite(std_reg2str[segment.enum]+':');
if not no_s then
if segment.enum=R_INTREGISTER then
asmwrite(intel_regname(segment.number))
else
asmwrite(std_reg2str[segment.enum]+':');
if assigned(symbol) then
begin
AsmWrite(symbol.name);
first:=false;
end;
if (base.enum<>R_NO) then
if not no_b then
begin
if not(first) then
AsmWrite('+')
else
first:=false;
AsmWrite(int_nasmreg2str[base.enum]);
if base.enum=R_INTREGISTER then
asmwrite(intel_regname(base.number))
else
asmwrite(int_nasmreg2str[base.enum]);
end;
if (index.enum<>R_NO) then
if not no_i then
begin
if not(first) then
AsmWrite('+')
else
first:=false;
if index.enum=R_INTREGISTER then
asmwrite(intel_regname(index.number))
else
AsmWrite(int_nasmreg2str[index.enum]);
if scalefactor<>0 then
AsmWrite('*'+tostr(scalefactor));
@ -278,9 +284,10 @@ interface
case o.typ of
top_reg :
begin
if o.reg.enum>lastreg then
internalerror(200301081);
AsmWrite(int_nasmreg2str[o.reg.enum]);
if o.reg.enum=R_INTREGISTER then
asmwrite(intel_regname(o.reg.number))
else
asmwrite(int_nasmreg2str[o.reg.enum]);
end;
top_const :
begin
@ -324,9 +331,10 @@ interface
case o.typ of
top_reg :
begin
if o.reg.enum>lastreg then
internalerror(200301081);
AsmWrite(int_nasmreg2str[o.reg.enum]);
if o.reg.enum=R_INTREGISTER then
asmwrite(intel_regname(o.reg.number))
else
asmwrite(int_nasmreg2str[o.reg.enum]);
end;
top_ref :
WriteReference(o.ref^);
@ -908,7 +916,13 @@ initialization
end.
{
$Log$
Revision 1.30 2003-01-08 18:43:57 daniel
Revision 1.31 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.30 2003/01/08 18:43:57 daniel
* Tregister changed into a record
Revision 1.29 2002/12/24 18:10:34 peter

15
compiler/i386/cga.pas
View File

@ -153,10 +153,9 @@ implementation
procedure emit_reg_reg(i : tasmop;s : topsize;reg1,reg2 : tregister);
begin
convert_register_to_enum(reg1);
convert_register_to_enum(reg2);
if (reg1.enum<>reg2.enum) or (i<>A_MOV) then
exprasmList.concat(Taicpu.Op_reg_reg(i,s,reg1,reg2));
if not ((reg1.enum=R_INTREGISTER) and (reg2.enum<>R_INTREGISTER) and
(reg1.number=reg2.number) and (i=A_MOV)) then
exprasmlist.concat(Taicpu.op_reg_reg(i,s,reg1,reg2));
end;
procedure emit_const_reg_reg(i : tasmop;s : topsize;c : longint;reg1,reg2 : tregister);
@ -177,7 +176,13 @@ implementation
end.
{
$Log$
Revision 1.36 2003-02-19 22:00:15 daniel
Revision 1.37 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.36 2003/02/19 22:00:15 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

20
compiler/i386/cpubase.pas
View File

@ -120,6 +120,9 @@ uses
{Number of first and last superregister.}
first_supreg = $01;
last_supreg = $10;
{Number of first and last imaginary register.}
first_imreg = $12;
last_imreg = $ff;
{Sub register numbers:}
R_SUBL = $00; {Like AL}
@ -530,7 +533,11 @@ uses
maxintregs = 4;
intregs = [R_EAX..R_BL];
{$ifdef newra}
usableregsint = [first_imreg..last_imreg];
{$else}
usableregsint = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
{$endif}
c_countusableregsint = 4;
maxfpuregs = 8;
@ -619,8 +626,13 @@ uses
{# Self pointer register : contains the instance address of an
object or class. }
self_pointer_reg = R_ESI;
{$ifdef newra}
RS_SELF_POINTER_REG = $11;
NR_SELF_POINTER_REG = $1103;
{$else}
RS_SELF_POINTER_REG = RS_ESI;
NR_SELF_POINTER_REG = NR_ESI;
{$endif}
{# Register for addressing absolute data in a position independant way,
such as in PIC code. The exact meaning is ABI specific. For
further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
@ -787,7 +799,13 @@ implementation
end.
{
$Log$
Revision 1.42 2003-02-19 22:00:15 daniel
Revision 1.43 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.42 2003/02/19 22:00:15 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

12
compiler/i386/rgcpu.pas
View File

@ -39,9 +39,11 @@ unit rgcpu;
fpuvaroffset : byte;
{ to keep the same allocation order as with the old routines }
{$ifndef newra}
function getregisterint(list:Taasmoutput;size:Tcgsize):Tregister;override;
procedure ungetregisterint(list:Taasmoutput;r:Tregister); override;
function getexplicitregisterint(list:Taasmoutput;r:Tnewregister):Tregister;override;
{$endif newra}
function getregisterfpu(list: taasmoutput) : tregister; override;
procedure ungetregisterfpu(list: taasmoutput; r : tregister); override;
@ -160,6 +162,7 @@ unit rgcpu;
{ trgcpu }
{************************************************************************}
{$ifndef newra}
function trgcpu.getregisterint(list:Taasmoutput;size:Tcgsize):Tregister;
var subreg:Tsubregister;
@ -262,6 +265,7 @@ unit rgcpu;
end;
result:=inherited getexplicitregisterint(list,r);
end;
{$endif newra}
function trgcpu.getregisterfpu(list: taasmoutput) : tregister;
@ -511,7 +515,13 @@ end.
{
$Log$
Revision 1.13 2003-03-07 21:57:53 daniel
Revision 1.14 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.13 2003/03/07 21:57:53 daniel
* Improved getregisterint
Revision 1.12 2003/02/19 22:00:16 daniel

3
compiler/msg/errore.msg
View File

@ -2054,8 +2054,9 @@ option_help_pages=11025_[
**2Ss_constructor name must be init (destructor must be done)
**2St_allow static keyword in objects
**1s_don't call assembler and linker (only with -a)
**2st_Generate script to link on target
**2sh_Generate script to link on host
**2sr_Skip register allocation phase (optimizations will be disabled)
**2st_Generate script to link on target
**1u<x>_undefines the symbol <x>
**1U_unit options:
**2Un_don't check the unit name

2
compiler/msgidx.inc
View File

@ -607,7 +607,7 @@ const
option_info=11024;
option_help_pages=11025;
MsgTxtSize = 34273;
MsgTxtSize = 34343;
MsgIdxMax : array[1..20] of longint=(
17,62,194,50,57,44,98,19,35,43,

66
compiler/msgtxt.inc
View File

@ -1,7 +1,7 @@
{$ifdef Delphi}
const msgtxt : array[0..000142] of string[240]=(
const msgtxt : array[0..000143] of string[240]=(
{$else Delphi}
const msgtxt : array[0..000142,1..240] of char=(
const msgtxt : array[0..000143,1..240] of char=(
{$endif Delphi}
'01000_T_Compiler: $1'#000+
'01001_D_Compiler OS: $1'#000+
@ -739,89 +739,89 @@ const msgtxt : array[0..000142,1..240] of char=(
'**2Ss_constructor name must be init (destructor must be done)'#010+
'**2St_allow static keyword in objects'#010+
'**1s_don'#039't call assembler and linker (only wi','th -a)'#010+
'**2st_Generate script to link on target'#010+
'**2sh_Generate script to link on host'#010+
'**2sr_Skip register allocation phase (optimizations will be disabled)'#010+
'**2st_Generate script to link on target'#010+
'**1u<x>_undefines the symbol <x>'#010+
'**1U_unit options:'#010+
'**2Un_don'#039't check the unit name'#010+
'**2Ur_generate release unit files'#010+
'*','*2Ur_generate release unit files'#010+
'**2Us_compile a system unit'#010+
'**1v<x>_B','e verbose. <x> is a combination of the following letters:'#010+
'**1v<x>_Be verbose. <x> is a combination of the following letters:'#010+
'**2*_e : Show errors (default) d : Show debug info'#010+
'**2*_w : Show warnings u : Show unit info'#010+
'**2*_w : Show warnings u : Show unit info',#010+
'**2*_n : Show notes t : Show tried/used files'#010+
'**2*_h',' : Show hints m : Show defined macros'#010+
'**2*_h : Show hints m : Show defined macros'#010+
'**2*_i : Show general info p : Show compiled procedures'#010+
'**2*_l : Show linenumbers c : Show conditionals'#010+
'**2*_a : Show everything 0 : Show nothing (excep','t errors'+
')'#010+
'**2*_l : Show linenumbers c : Show con','ditionals'#010+
'**2*_a : Show everything 0 : Show nothing (except errors)'#010+
'**2*_b : Show all procedure r : Rhide/GCC compatibility mode'#010+
'**2*_ declarations if an error x : Executable info (Win32 only)'#010+
'**2*_ occurs'#010+
'**1V_write fpcdebug.txt file with lots of debugging info'#010+
'**1X_executable o','ptions:'#010+
'**1V','_write fpcdebug.txt file with lots of debugging info'#010+
'**1X_executable options:'#010+
'*L2Xc_link with the c library'#010+
'**2Xs_strip all symbols from executable'#010+
'**2XD_try to link dynamic (defines FPC_LINK_DYNAMIC)'#010+
'**2XS_try to link static (default) (defines FPC_LINK_STATIC)'#010+
'**2XX_try to link smart (def','ines FPC_LINK_SMART)'#010+
'**2XS_try to link static (defa','ult) (defines FPC_LINK_STATIC)'#010+
'**2XX_try to link smart (defines FPC_LINK_SMART)'#010+
'**0*_Processor specific options:'#010+
'3*1A<x>_output format:'#010+
'3*2Aas_assemble using GNU AS'#010+
'3*2Anasmcoff_coff (Go32v2) file using Nasm'#010+
'3*2Anasmelf_elf32 (Linux) file using Nasm'#010+
'3*2Anasmelf_elf32 (Li','nux) file using Nasm'#010+
'3*2Anasmobj_obj file using Nasm'#010+
'3*2Amasm_obj file',' using Masm (Microsoft)'#010+
'3*2Amasm_obj file using Masm (Microsoft)'#010+
'3*2Atasm_obj file using Tasm (Borland)'#010+
'3*2Acoff_coff (Go32v2) using internal writer'#010+
'3*2Apecoff_pecoff (Win32) using internal writer'#010+
'3*1R<x>_assembler reading style:'#010+
'3*1R<x>_assemb','ler reading style:'#010+
'3*2Ratt_read AT&T style assembler'#010+
'3*2Rintel_read In','tel style assembler'#010+
'3*2Rintel_read Intel style assembler'#010+
'3*2Rdirect_copy assembler text directly to assembler file'#010+
'3*1O<x>_optimizations:'#010+
'3*2Og_generate smaller code'#010+
'3*2OG_generate faster code (default)'#010+
'3*2Or_keep certain variables in registers'#010+
'3*2Ou_enable uncertain optimizat','ions (see docs)'#010+
'3*2O','r_keep certain variables in registers'#010+
'3*2Ou_enable uncertain optimizations (see docs)'#010+
'3*2O1_level 1 optimizations (quick optimizations)'#010+
'3*2O2_level 2 optimizations (-O1 + slower optimizations)'#010+
'3*2O3_level 3 optimizations (-O2 repeatedly, max 5 times)'#010+
'3*2O3_level 3 optimizations (-O2 repeatedly, ma','x 5 times)'#010+
'3*2Op<x>_target processor:'#010+
'3*3Op1_set target processor to 3','86/486'#010+
'3*3Op1_set target processor to 386/486'#010+
'3*3Op2_set target processor to Pentium/PentiumMMX (tm)'#010+
'3*3Op3_set target processor to PPro/PII/c6x86/K6 (tm)'#010+
'3*1T<x>_Target operating system:'#010+
'3*2TGO32V2_version 2 of DJ Delorie DOS extender'#010+
'3*2TGO32V2_version 2 ','of DJ Delorie DOS extender'#010+
'3*2TWDOSX DOS 32 Bit Extender'#010+
'3*2TLINUX_Lin','ux'#010+
'3*2TLINUX_Linux'#010+
'3*2Tnetware_Novell Netware Module (experimental)'#010+
'3*2TOS2_OS/2 2.x'#010+
'3*2TSUNOS_SunOS/Solaris'#010+
'3*2TWin32_Windows 32 Bit'#010+
'3*1W<x>_Win32 target options'#010+
'3*2WB<x>_Set Image base to Hexadecimal <x> value'#010+
'3*2WB<x>_Set Image base',' to Hexadecimal <x> value'#010+
'3*2WC_Specify console type application'#010+
'3*2WD','_Use DEFFILE to export functions of DLL or EXE'#010+
'3*2WD_Use DEFFILE to export functions of DLL or EXE'#010+
'3*2WF_Specify full-screen type application (OS/2 only)'#010+
'3*2WG_Specify graphic type application'#010+
'3*2WN_Do not generate relocation code (necessary for debugging)'#010+
'3*2WN_Do not generate relocat','ion code (necessary for debugging)'#010+
'3*2WR_Generate relocation code'#010+
'6*1A','<x>_output format'#010+
'6*1A<x>_output format'#010+
'6*2Aas_Unix o-file using GNU AS'#010+
'6*2Agas_GNU Motorola assembler'#010+
'6*2Amit_MIT Syntax (old GAS)'#010+
'6*2Amot_Standard Motorola assembler'#010+
'6*1O_optimizations:'#010+
'6*2Oa_turn on the optimizer'#010+
'6*2O','a_turn on the optimizer'#010+
'6*2Og_generate smaller code'#010+
'6*2OG_generate fas','ter code (default)'#010+
'6*2OG_generate faster code (default)'#010+
'6*2Ox_optimize maximum (still BUGGY!!!)'#010+
'6*2O0_set target processor to a MC68000'#010+
'6*2O2_set target processor to a MC68020+ (default)'#010+
'6*1R<x>_assembler reading style:'#010+
'6*1R<x>_assembler re','ading style:'#010+
'6*2RMOT_read motorola style assembler'#010+
'6*1T<x>_Target oper','ating system:'#010+
'6*1T<x>_Target operating system:'#010+
'6*2TAMIGA_Commodore Amiga'#010+
'6*2TATARI_Atari ST/STe/TT'#010+
'6*2TMACOS_Macintosh m68k'#010+
@ -829,5 +829,5 @@ const msgtxt : array[0..000142,1..240] of char=(
'6*2TPALMOS_PalmOS'#010+
'**1*_'#010+
'**1?_shows this help'#010+
'**1h_shows this help without waiting'#000
'**1h_shows thi','s help without waiting'#000
);

12
compiler/options.pas
View File

@ -855,6 +855,10 @@ begin
initglobalswitches:=initglobalswitches-[cs_link_on_target]
else if more='t' then
initglobalswitches:=initglobalswitches+[cs_link_on_target]
{$ifdef newra}
else if more='r' then
initglobalswitches:=initglobalswitches+[cs_no_regalloc]
{$endif newra}
else if more<>'' then
IllegalPara(opt);
end;
@ -1889,7 +1893,13 @@ finalization
end.
{
$Log$
Revision 1.91 2002-12-06 16:56:58 peter
Revision 1.92 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.91 2002/12/06 16:56:58 peter
* only compile cs_fp_emulation support when cpufpuemu is defined
* define cpufpuemu for m68k only

21
compiler/psub.pas
View File

@ -362,15 +362,18 @@ implementation
aktprocdef.usedotherregisters:=rg.usedinproc;
procinfo.aktproccode.insertlist(procinfo.aktentrycode);
procinfo.aktproccode.concatlist(procinfo.aktexitcode);
if not(cs_no_regalloc in aktglobalswitches) then
begin
{$ifdef i386}
procinfo.aktproccode.convert_registers;
procinfo.aktproccode.convert_registers;
{$endif}
{$ifndef NoOpt}
if (cs_optimize in aktglobalswitches) and
{ do not optimize pure assembler procedures }
((procinfo.flags and pi_is_assembler)=0) then
optimize(procinfo.aktproccode);
if (cs_optimize in aktglobalswitches) and
{ do not optimize pure assembler procedures }
((procinfo.flags and pi_is_assembler)=0) then
optimize(procinfo.aktproccode);
{$endif NoOpt}
end;
{ save local data (casetable) also in the same file }
if assigned(procinfo.aktlocaldata) and
(not procinfo.aktlocaldata.empty) then
@ -848,7 +851,13 @@ implementation
end.
{
$Log$
Revision 1.92 2003-02-19 22:00:14 daniel
Revision 1.93 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.92 2003/02/19 22:00:14 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

17
compiler/rgobj.pas
View File

@ -483,8 +483,13 @@ unit rgobj;
subreg:=cgsize2subreg(size);
result:=getregistergenint(list,
subreg,
{$ifdef newra}
first_imreg,
last_imreg,
{$else}
first_supreg,
last_supreg,
{$endif}
usedintbyproc,
usedintinproc,
unusedregsint,
@ -645,7 +650,11 @@ unit rgobj;
countunusedregsint:=countusableregsint;
countunusedregsfpu:=countusableregsfpu;
countunusedregsmm:=countusableregsmm;
{$ifdef newra}
unusedregsint:=[0..255];
{$else}
unusedregsint:=usableregsint;
{$endif}
unusedregsfpu:=usableregsfpu;
unusedregsmm:=usableregsmm;
end;
@ -1208,7 +1217,13 @@ end.
{
$Log$
Revision 1.25 2003-02-26 20:50:45 daniel
Revision 1.26 2003-03-08 08:59:07 daniel
+ $define newra will enable new register allocator
+ getregisterint will return imaginary registers with $newra
+ -sr switch added, will skip register allocation so you can see
the direct output of the code generator before register allocation
Revision 1.25 2003/02/26 20:50:45 daniel
* Fixed ungetreference
Revision 1.24 2003/02/19 22:39:56 daniel