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* x86: Correct fileinfo and some refactoring for OptPass1SHLSAL
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@ -6169,16 +6169,16 @@ unit aoptx86;
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if not(TmpBool2) and
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(taicpu(p).oper[0]^.val=1) then
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begin
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hp1:=taicpu.Op_reg_reg(A_ADD,taicpu(p).opsize,
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taicpu(p).oper[1]^.reg, taicpu(p).oper[1]^.reg)
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taicpu(p).opcode := A_ADD;
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taicpu(p).loadreg(0, taicpu(p).oper[1]^.reg);
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end
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else
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hp1:=taicpu.op_ref_reg(A_LEA, taicpu(p).opsize, TmpRef,
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taicpu(p).oper[1]^.reg);
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begin
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taicpu(p).opcode := A_LEA;
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taicpu(p).loadref(0, TmpRef);
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end;
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DebugMsg(SPeepholeOptimization + 'ShlAddLeaSubIncDec2Lea',p);
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InsertLLItem(p.previous, p.next, hp1);
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p.free;
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p := hp1;
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Result := True;
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end;
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end
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{$ifndef x86_64}
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@ -6189,11 +6189,9 @@ unit aoptx86;
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(unlike shl, which is only Tairable in the U pipe) }
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if taicpu(p).oper[0]^.val=1 then
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begin
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hp1 := taicpu.Op_reg_reg(A_ADD,taicpu(p).opsize,
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taicpu(p).oper[1]^.reg, taicpu(p).oper[1]^.reg);
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InsertLLItem(p.previous, p.next, hp1);
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p.free;
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p := hp1;
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taicpu(p).opcode := A_ADD;
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taicpu(p).loadreg(0, taicpu(p).oper[1]^.reg);
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Result := True;
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end
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{ changes "shl $2, %reg" to "lea (,%reg,4), %reg"
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"shl $3, %reg" to "lea (,%reg,8), %reg }
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@ -6203,10 +6201,9 @@ unit aoptx86;
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reference_reset(tmpref,2,[]);
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TmpRef.index := taicpu(p).oper[1]^.reg;
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TmpRef.scalefactor := 1 shl taicpu(p).oper[0]^.val;
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hp1 := taicpu.Op_ref_reg(A_LEA,S_L,TmpRef, taicpu(p).oper[1]^.reg);
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InsertLLItem(p.previous, p.next, hp1);
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p.free;
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p := hp1;
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taicpu(p).opcode := A_LEA;
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taicpu(p).loadref(0, TmpRef);
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Result := True;
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end;
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end
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{$endif x86_64}
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