paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-17 05:39:19 +02:00
Code Issues Packages Projects Releases Wiki Activity

* Tcgx86.g_concatcopy: use boolean variables saved_ds and saved_es to keep track

Browse Source 
whether these segment registers were saved on the stack or not

git-svn-id: trunk@27460 -
This commit is contained in:
nickysn 2014-04-04 00:10:36 +00:00
parent 34e8e5a0dc
commit e9e4cc8bcb
1 changed files with 14 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
compiler/x86/cgx86.pas
View File

@ -2190,6 +2190,7 @@ unit cgx86;
copysize:byte; copysize:byte;
cgsize:Tcgsize; cgsize:Tcgsize;
cm:copymode; cm:copymode;
saved_ds,saved_es: Boolean;
begin begin
cm:=copy_move; cm:=copy_move;
@ -2449,6 +2450,7 @@ unit cgx86;
if (dest.segment=NR_NO) then if (dest.segment=NR_NO) then
begin begin
a_loadaddr_ref_reg(list,dest,REGDI); a_loadaddr_ref_reg(list,dest,REGDI);
saved_es:=false;
{$ifdef volatile_es} {$ifdef volatile_es}
list.concat(taicpu.op_reg(A_PUSH,push_segment_size,NR_DS)); list.concat(taicpu.op_reg(A_PUSH,push_segment_size,NR_DS));
list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES)); list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES));
@ -2459,21 +2461,28 @@ unit cgx86;
dstref:=dest; dstref:=dest;
dstref.segment:=NR_NO; dstref.segment:=NR_NO;
a_loadaddr_ref_reg(list,dstref,REGDI); a_loadaddr_ref_reg(list,dstref,REGDI);
{$ifndef volatile_es} {$ifdef volatile_es}
saved_es:=false;
{$else volatile_es}
list.concat(taicpu.op_reg(A_PUSH,push_segment_size,NR_ES)); list.concat(taicpu.op_reg(A_PUSH,push_segment_size,NR_ES));
{$endif not volatile_es} saved_es:=true;
{$endif volatile_es}
list.concat(taicpu.op_reg(A_PUSH,push_segment_size,dest.segment)); list.concat(taicpu.op_reg(A_PUSH,push_segment_size,dest.segment));
list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES)); list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES));
end; end;
getcpuregister(list,REGSI); getcpuregister(list,REGSI);
if (source.segment=NR_NO) then if (source.segment=NR_NO) then
a_loadaddr_ref_reg(list,source,REGSI) begin
a_loadaddr_ref_reg(list,source,REGSI);
saved_ds:=false;
end
else else
begin begin
srcref:=source; srcref:=source;
srcref.segment:=NR_NO; srcref.segment:=NR_NO;
a_loadaddr_ref_reg(list,srcref,REGSI); a_loadaddr_ref_reg(list,srcref,REGSI);
list.concat(taicpu.op_reg(A_PUSH,push_segment_size,NR_DS)); list.concat(taicpu.op_reg(A_PUSH,push_segment_size,NR_DS));
saved_ds:=true;
list.concat(taicpu.op_reg(A_PUSH,push_segment_size,source.segment)); list.concat(taicpu.op_reg(A_PUSH,push_segment_size,source.segment));
list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_DS)); list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_DS));
end; end;
@ -2523,12 +2532,10 @@ unit cgx86;
ungetcpuregister(list,REGCX); ungetcpuregister(list,REGCX);
ungetcpuregister(list,REGSI); ungetcpuregister(list,REGSI);
ungetcpuregister(list,REGDI); ungetcpuregister(list,REGDI);
if (source.segment<>NR_NO) then if saved_ds then
list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_DS)); list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_DS));
{$ifndef volatile_es} if saved_es then
if (dest.segment<>NR_NO) then
list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES)); list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES));
{$endif not volatile_es}
end; end;
end; end;
end; end;