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+ improved x86-64 assembler
git-svn-id: trunk@2983 -
This commit is contained in:
florian
parent
37c81492ad
commit
ec768f88ae
@ -250,10 +250,13 @@ interface
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procedure ppuderefoper(var o:toper);override;
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private
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{ next fields are filled in pass1, so pass2 is faster }
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inssize : shortint;
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insentry : PInsEntry;
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insoffset : longint;
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LastInsOffset : longint; { need to be public to be reset }
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insentry : PInsEntry;
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inssize : shortint;
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{$ifdef x86_64}
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rex : byte;
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{$endif x86_64}
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function InsEnd:longint;
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procedure create_ot(objdata:TObjData);
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function Matches(p:PInsEntry):boolean;
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@ -973,12 +976,16 @@ implementation
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*****************************************************************************}
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type
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ea=packed record
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ea = packed record
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sib_present : boolean;
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bytes : byte;
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size : byte;
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modrm : byte;
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sib : byte;
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{$ifdef x86_64}
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rex_present : boolean;
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rex : byte;
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{$endif x86_64}
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end;
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procedure taicpu.create_ot(objdata:TObjData);
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@ -1414,7 +1421,19 @@ implementation
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output.bytes:=0;
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output.modrm:=$c0 or (rfield shl 3) or rv;
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output.size:=1;
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if ((getregtype(input.reg)=R_INTREGISTER) and
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(getsupreg(input.reg)>=RS_R8)) or
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((getregtype(input.reg)=R_MMREGISTER) and
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(getsupreg(input.reg)>=RS_XMM8)) then
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begin
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output.rex_present:=true;
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output.rex:=output.rex or $44;
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inc(output.size,1);
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end;
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process_ea:=true;
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exit;
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end;
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{No register, so memory reference.}
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@ -1444,36 +1463,32 @@ implementation
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{ 16 bit address? }
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if ((ir<>NR_NO) and (isub<>R_SUBADDR)) or
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((br<>NR_NO) and (bsub<>R_SUBADDR)) then
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{$ifdef x86_64}
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message(asmw_e_16bit_32bit_not_supported);
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{$else x86_64}
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message(asmw_e_16bit_not_supported);
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{$endif x86_64}
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{$ifdef OPTEA}
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{ make single reg base }
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if (br=NR_NO) and (s=1) then
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begin
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br:=ir;
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ir:=NR_NO;
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end;
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{ convert [3,5,9]*EAX to EAX+[2,4,8]*EAX }
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if (br=NR_NO) and
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(((s=2) and (ir<>NR_ESP)) or
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(s=3) or (s=5) or (s=9)) then
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begin
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br:=ir;
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dec(s);
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end;
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{ swap ESP into base if scalefactor is 1 }
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if (s=1) and (ir=NR_ESP) then
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begin
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ir:=br;
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br:=NR_ESP;
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end;
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{$endif OPTEA}
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{ wrong, for various reasons }
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if (ir=NR_ESP) or ((s<>1) and (s<>2) and (s<>4) and (s<>8) and (ir<>NR_NO)) then
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exit;
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if ((getregtype(br)=R_INTREGISTER) and
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(getsupreg(br)>=RS_R8)) or
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((getregtype(br)=R_MMREGISTER) and
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(getsupreg(br)>=RS_XMM8)) then
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begin
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output.rex_present:=true;
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output.rex:=output.rex or $41;
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end;
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if ((getregtype(ir)=R_INTREGISTER) and
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(getsupreg(ir)>=RS_R8)) or
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((getregtype(ir)=R_MMREGISTER) and
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(getsupreg(ir)>=RS_XMM8)) then
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begin
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output.rex_present:=true;
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output.rex:=output.rex or $42;
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end;
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process_ea:=true;
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{ base }
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case br of
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NR_RAX : base:=0;
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@ -1490,14 +1505,14 @@ implementation
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end;
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{ index }
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case ir of
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NR_EAX : index:=0;
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NR_ECX : index:=1;
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NR_EDX : index:=2;
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NR_EBX : index:=3;
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NR_RAX : index:=0;
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NR_RCX : index:=1;
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NR_RDX : index:=2;
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NR_RBX : index:=3;
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NR_NO : index:=4;
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NR_EBP : index:=5;
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NR_ESI : index:=6;
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NR_EDI : index:=7;
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NR_RBP : index:=5;
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NR_RSI : index:=6;
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NR_RDI : index:=7;
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else
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exit;
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end;
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@ -1535,10 +1550,7 @@ implementation
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output.sib:=(scalefactor shl 6) or (index shl 3) or base;
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end;
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end;
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if output.sib_present then
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output.size:=2+output.bytes
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else
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output.size:=1+output.bytes;
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output.size:=1+ord(output.sib_present)+ord(output.rex_present)+output.bytes;
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process_ea:=true;
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end;
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@ -1708,7 +1720,19 @@ implementation
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inc(codes,c);
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inc(len,c);
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end;
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8,9,10,11 :
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8,9,10 :
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begin
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{$ifdef x86_64}
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if ((getregtype(oper[c-8]^.reg)=R_INTREGISTER) and
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(getsupreg(oper[c-8]^.reg)>=RS_R8)) or
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((getregtype(oper[c-8]^.reg)=R_MMREGISTER) and
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(getsupreg(oper[c-8]^.reg)>=RS_XMM8)) then
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rex:=rex or $41;
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{$endif x86_64}
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inc(codes);
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inc(len);
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end;
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11 :
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begin
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inc(codes);
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inc(len);
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@ -1730,7 +1754,13 @@ implementation
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31,
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48,49,50 :
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inc(len,2);
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28,29,30, { we don't have 16 bit immediates code }
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28,29,30:
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begin
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if opsize=S_Q then
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inc(len,8)
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else
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inc(len,4);
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end;
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32,33,34,
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52,53,54,
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56,57,58 :
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@ -1741,9 +1771,15 @@ implementation
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208,209,210 :
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begin
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case (oper[c-208]^.ot and OT_SIZE_MASK) of
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OT_BITS16,
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OT_BITS64 :
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OT_BITS16:
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inc(len);
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{$ifdef x86_64}
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OT_BITS64:
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begin
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rex:=rex or $48;
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inc(len);
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end;
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{$endif x86_64}
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end;
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end;
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212,
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@ -1759,10 +1795,21 @@ implementation
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inc(len);
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64..191 :
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begin
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{$ifdef x86_64}
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ea_data.rex:=0;
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ea_data.rex_present:=false;
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{$endif x86_64}
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if not process_ea(oper[(c shr 3) and 7]^, ea_data, 0) then
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Message(asmw_e_invalid_effective_address)
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Message(asmw_e_invalid_effective_address)
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else
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inc(len,ea_data.size);
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inc(len,ea_data.size);
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{$ifdef x86_64}
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{ did we already create include a rex into the length calculation? }
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if (rex<>0) and (ea_data.rex<>0) then
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dec(len);
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rex:=rex or ea_data.rex;
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{$endif x86_64}
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end;
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else
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InternalError(200603141);
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@ -1821,26 +1868,26 @@ implementation
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}
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var
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currval : longint;
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currval : aint;
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currsym : tobjsymbol;
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procedure getvalsym(opidx:longint);
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begin
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case oper[opidx]^.typ of
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top_ref :
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begin
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currval:=oper[opidx]^.ref^.offset;
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currsym:=ObjData.symbolref(oper[opidx]^.ref^.symbol);
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end;
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top_const :
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begin
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currval:=longint(oper[opidx]^.val);
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currsym:=nil;
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end;
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else
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Message(asmw_e_immediate_or_reference_expected);
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begin
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case oper[opidx]^.typ of
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top_ref :
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begin
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currval:=oper[opidx]^.ref^.offset;
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currsym:=ObjData.symbolref(oper[opidx]^.ref^.symbol);
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end;
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top_const :
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begin
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currval:=longint(oper[opidx]^.val);
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currsym:=nil;
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end;
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else
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Message(asmw_e_immediate_or_reference_expected);
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end;
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end;
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end;
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const
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CondVal:array[TAsmCond] of byte=($0,
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@ -1855,7 +1902,13 @@ implementation
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rfield,
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data,s,opidx : longint;
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ea_data : ea;
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{$ifdef extdebug}
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rexwritten : boolean;
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{$endif extdebug}
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begin
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{$ifdef extdebug}
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rexwritten:=false;
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{$endif extdebug}
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{ safety check }
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if objdata.currobjsec.size<>insoffset then
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internalerror(200130121);
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@ -1914,6 +1967,13 @@ implementation
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end;
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8,9,10 :
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begin
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{ rex should be written at this point }
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{$ifdef x86_64}
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{$ifdef extdebug}
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if (rex<>0) and not(rexwritten) then
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internalerror(200603192);
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{$endif extdebug}
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{$endif x86_64}
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bytes[0]:=ord(codes^)+regval(oper[c-8]^.reg);
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inc(codes);
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objdata.writebytes(bytes,1);
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@ -1972,10 +2032,20 @@ implementation
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28,29,30 :
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begin
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getvalsym(c-28);
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if assigned(currsym) then
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objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE)
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if opsize=S_Q then
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begin
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if assigned(currsym) then
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objdata.writereloc(currval,8,currsym,RELOC_ABSOLUTE)
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else
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objdata.writebytes(currval,8);
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end
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else
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objdata.writebytes(currval,4);
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begin
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if assigned(currsym) then
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objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE)
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else
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objdata.writebytes(currval,4);
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end
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end;
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32,33,34 :
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begin
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@ -2032,15 +2102,21 @@ implementation
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bytes[0]:=$66;
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objdata.writebytes(bytes,1);
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end;
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OT_BITS64 :
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begin
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{$ifndef x86_64}
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OT_BITS64 :
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Message(asmw_e_64bit_not_supported);
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{$endif x86_64}
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bytes[0]:=$48;
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objdata.writebytes(bytes,1);
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end;
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end;
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{$ifdef x86_64}
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if rex<>0 then
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begin
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bytes[0]:=rex;
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{$ifdef extdebug}
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rexwritten:=true;
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{$endif extdebug}
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objdata.writebytes(bytes,1);
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end;
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{$endif x86_64}
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end;
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212 :
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begin
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@ -2081,6 +2157,13 @@ implementation
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end
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else
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begin
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{ rex should be written at this point }
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{$ifdef x86_64}
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{$ifdef extdebug}
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if (rex<>0) and not(rexwritten) then
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internalerror(200603191);
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{$endif extdebug}
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{$endif x86_64}
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if (c>=64) and (c<=191) then
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begin
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if (c<127) then
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@ -2094,7 +2177,7 @@ implementation
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rfield:=c and 7;
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opidx:=(c shr 3) and 7;
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if not process_ea(oper[opidx]^,ea_data,rfield) then
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Message(asmw_e_invalid_effective_address);
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Message(asmw_e_invalid_effective_address);
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pb:=@bytes;
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pb^:=chr(ea_data.modrm);
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@ -1014,7 +1014,7 @@ mem_offs,reg_ax|32 \300\320\1\xA3\34 8086,SM,NOX86_64
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regmem,reg16|32|64 \320\300\1\x89\101 8086,SM
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reg_ax|32,mem_offs \325\301\1\xA1\35 8086,SM,NOX86_64
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reg16|32|64,regmem \320\301\1\x8B\110 8086,SM
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reg32|64,imm \320\10\xB8\41 386,SD
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reg32|64,imm \320\10\xB8\35 386,SD
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rm32|64,imm \320\300\1\xC7\200\41 386,SD
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reg16,imm \324\10\xB8\31 8086,SW
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rm16,imm \324\300\1\xC7\200\31 8086,SW
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@ -2937,7 +2937,7 @@
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opcode : A_MOV;
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ops : 2;
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optypes : (ot_reg32 or ot_bits64,ot_immediate,ot_none);
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code : #208#8#184#33;
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code : #208#8#184#29;
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flags : if_386 or if_sd
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),
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(
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