mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-27 09:53:09 +02:00
+ when compiling for Darwin/ARM, pass the subarchitecture to the linker.
The old linker option to accept object files from all subarchitecture types no longer works. + support for subarchitectures in fcl-res/fpcres git-svn-id: trunk@18070 -
This commit is contained in:
parent
da056da20f
commit
ec8c7b4888
@ -75,7 +75,7 @@ implementation
|
|||||||
uses
|
uses
|
||||||
SysUtils,
|
SysUtils,
|
||||||
cutils,cfileutl,cclasses,
|
cutils,cfileutl,cclasses,
|
||||||
Globtype,Globals,Verbose,Fmodule, comphook;
|
Globtype,Globals,Verbose,Fmodule, comphook,cpuinfo;
|
||||||
|
|
||||||
{****************************************************************************
|
{****************************************************************************
|
||||||
TRESOURCEFILE
|
TRESOURCEFILE
|
||||||
@ -237,7 +237,8 @@ var
|
|||||||
srcfilepath,
|
srcfilepath,
|
||||||
preprocessorbin,
|
preprocessorbin,
|
||||||
s : TCmdStr;
|
s : TCmdStr;
|
||||||
arch : ansistring;
|
arch,
|
||||||
|
subarch: ansistring;
|
||||||
|
|
||||||
function WindresFileName(filename: TCmdStr): TCmdStr;
|
function WindresFileName(filename: TCmdStr): TCmdStr;
|
||||||
// to be on the safe side, for files that are passed to the preprocessor,
|
// to be on the safe side, for files that are passed to the preprocessor,
|
||||||
@ -271,11 +272,18 @@ begin
|
|||||||
else
|
else
|
||||||
ObjUsed:=(pos('$OBJ',s)>0);
|
ObjUsed:=(pos('$OBJ',s)>0);
|
||||||
Replace(s,'$OBJ',maybequoted(OutName));
|
Replace(s,'$OBJ',maybequoted(OutName));
|
||||||
|
subarch:='all';
|
||||||
arch:=cpu2str[target_cpu];
|
arch:=cpu2str[target_cpu];
|
||||||
//Differentiate between arm and armeb
|
if (source_info.cpu=systems.cpu_arm) then
|
||||||
if (source_info.cpu=cpu_arm) and (source_info.endian=endian_big) then
|
begin
|
||||||
arch:=arch+'eb';
|
//Differentiate between arm and armeb
|
||||||
|
if (source_info.endian=endian_big) then
|
||||||
|
arch:=arch+'eb';
|
||||||
|
end;
|
||||||
Replace(s,'$ARCH',arch);
|
Replace(s,'$ARCH',arch);
|
||||||
|
if target_info.system=system_arm_darwin then
|
||||||
|
subarch:=lower(cputypestr[current_settings.cputype]);
|
||||||
|
Replace(s,'$SUBARCH',subarch);
|
||||||
case target_info.endian of
|
case target_info.endian of
|
||||||
endian_little : Replace(s,'$ENDIAN','littleendian');
|
endian_little : Replace(s,'$ENDIAN','littleendian');
|
||||||
endian_big : Replace(s,'$ENDIAN','bigendian');
|
endian_big : Replace(s,'$ENDIAN','bigendian');
|
||||||
|
@ -37,7 +37,7 @@ unit i_bsd;
|
|||||||
(
|
(
|
||||||
id : res_macho;
|
id : res_macho;
|
||||||
resbin : 'fpcres';
|
resbin : 'fpcres';
|
||||||
rescmd : '-o $OBJ -a $ARCH -of mach-o $DBG';
|
rescmd : '-o $OBJ -a $ARCH -s $SUBARCH -of mach-o $DBG';
|
||||||
rcbin : 'windres';
|
rcbin : 'windres';
|
||||||
rccmd : '--include $INC -O res -o $RES $RC';
|
rccmd : '--include $INC -O res -o $RES $RC';
|
||||||
resourcefileclass : nil;
|
resourcefileclass : nil;
|
||||||
|
@ -341,9 +341,9 @@ begin
|
|||||||
system_x86_64_darwin:
|
system_x86_64_darwin:
|
||||||
LinkRes.Add('x86_64');
|
LinkRes.Add('x86_64');
|
||||||
system_arm_darwin:
|
system_arm_darwin:
|
||||||
{ don't specify architecture subtype, because then CPU_SUBTYPE_ALL
|
{ current versions of the linker require the sub-architecture type
|
||||||
files, such as compiled resources, are rejected }
|
to be specified }
|
||||||
LinkRes.Add('arm');
|
LinkRes.Add(lower(cputypestr[current_settings.cputype]));
|
||||||
end;
|
end;
|
||||||
end;
|
end;
|
||||||
end;
|
end;
|
||||||
|
@ -56,6 +56,11 @@ const
|
|||||||
CPU_SUBTYPE_X86_64_ALL = CPU_SUBTYPE_I386_ALL;
|
CPU_SUBTYPE_X86_64_ALL = CPU_SUBTYPE_I386_ALL;
|
||||||
CPU_SUBTYPE_POWERPC_ALL = 0;
|
CPU_SUBTYPE_POWERPC_ALL = 0;
|
||||||
CPU_SUBTYPE_ARM_ALL = 0;
|
CPU_SUBTYPE_ARM_ALL = 0;
|
||||||
|
CPU_SUBTYPE_ARM_V4T = 5;
|
||||||
|
CPU_SUBTYPE_ARM_V6 = 6;
|
||||||
|
CPU_SUBTYPE_ARM_V5TEJ = 7;
|
||||||
|
CPU_SUBTYPE_ARM_XSCALE = 8;
|
||||||
|
CPU_SUBTYPE_ARM_V7 = 9;
|
||||||
|
|
||||||
//Mach-O object types
|
//Mach-O object types
|
||||||
MH_OBJECT = $1; // relocatable object file
|
MH_OBJECT = $1; // relocatable object file
|
||||||
|
@ -37,7 +37,8 @@ type
|
|||||||
procedure FixResHeader(aStream : TStream); override;
|
procedure FixResHeader(aStream : TStream); override;
|
||||||
public
|
public
|
||||||
constructor Create(aParent : TMachOResourceWriter; const aMachineType
|
constructor Create(aParent : TMachOResourceWriter; const aMachineType
|
||||||
: TMachOMachineType; const aOppositeEndianess : boolean); override;
|
: TMachOMachineType; const aSubMachineType: TMachoSubMachineType;
|
||||||
|
const aOppositeEndianess : boolean); override;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
{ _TMachOSymbolTable_ }
|
{ _TMachOSymbolTable_ }
|
||||||
@ -336,9 +337,9 @@ begin
|
|||||||
end;
|
end;
|
||||||
|
|
||||||
constructor _TMachOSubWriter_.Create(aParent : TMachOResourceWriter;
|
constructor _TMachOSubWriter_.Create(aParent : TMachOResourceWriter;
|
||||||
const aMachineType : TMachOMachineType; const aOppositeEndianess : boolean);
|
const aMachineType : TMachOMachineType; const aSubMachineType: TMachoSubMachineType; const aOppositeEndianess : boolean);
|
||||||
begin
|
begin
|
||||||
inherited Create(aParent, aMachineType,aOppositeEndianess);
|
inherited Create(aParent,aMachineType,aSubMachineType,aOppositeEndianess);
|
||||||
fSymbolTable:=_TMachOSymbolTable_.Create(fMachOStringTable);
|
fSymbolTable:=_TMachOSymbolTable_.Create(fMachOStringTable);
|
||||||
fSymbolTable.OppositeEndianess:=fOppositeEndianess;
|
fSymbolTable.OppositeEndianess:=fOppositeEndianess;
|
||||||
{$IF _TMachOSubWriter_=TMachO32SubWriter}
|
{$IF _TMachOSubWriter_=TMachO32SubWriter}
|
||||||
|
@ -21,6 +21,11 @@ interface
|
|||||||
|
|
||||||
type
|
type
|
||||||
TMachOMachineType = (mmtpowerpc, mmtpowerpc64, mmti386, mmtx86_64, mmtarm);
|
TMachOMachineType = (mmtpowerpc, mmtpowerpc64, mmti386, mmtx86_64, mmtarm);
|
||||||
|
TMachOSubMachineTypePowerPC = (msmppc_all);
|
||||||
|
TMachOSubMachineTypePowerPC64 = (msmppc64_all);
|
||||||
|
TMachOSubMachineType386 = (msm386_all);
|
||||||
|
TMachOSubMachineTypex64 = (msmx64_all);
|
||||||
|
TMachOSubMachineTypeArm = (msmarm_all,msmarm_v4t,msmarm_v6,msmarm_v5tej,msmarm_xscale,msmarm_v7);
|
||||||
TSegSectName = array[0..15] of char;
|
TSegSectName = array[0..15] of char;
|
||||||
|
|
||||||
type
|
type
|
||||||
|
@ -30,6 +30,15 @@ type
|
|||||||
|
|
||||||
{ TMachOResourceWriter }
|
{ TMachOResourceWriter }
|
||||||
|
|
||||||
|
TMachoSubMachineType = record
|
||||||
|
case TMachOMachineType of
|
||||||
|
msmppc_all: (fPpcSubType: TMachOSubMachineTypePowerPC);
|
||||||
|
msmppc64_all: (fPpc64SubType: TMachOSubMachineTypePowerPC64);
|
||||||
|
msm386_all: (f386SubType: TMachOSubMachineType386);
|
||||||
|
msmx64_all: (fX64SubType: TMachOSubMachineTypex64);
|
||||||
|
mmtarm: (fArmSubType: TMachOSubMachineTypeArm);
|
||||||
|
end;
|
||||||
|
|
||||||
TMachOResourceWriter = class(TAbstractResourceWriter)
|
TMachOResourceWriter = class(TAbstractResourceWriter)
|
||||||
private
|
private
|
||||||
fExtensions : string;
|
fExtensions : string;
|
||||||
@ -38,10 +47,12 @@ type
|
|||||||
fEndianess : integer;
|
fEndianess : integer;
|
||||||
fOppositeEndianess : boolean;
|
fOppositeEndianess : boolean;
|
||||||
fMachineType : TMachOMachineType;
|
fMachineType : TMachOMachineType;
|
||||||
|
fSubMachineType : TMachoSubMachineType;
|
||||||
fBits : integer;
|
fBits : integer;
|
||||||
|
|
||||||
procedure SetDefaultTarget;
|
procedure SetDefaultTarget;
|
||||||
procedure SetMachineType(const aMachineType : TMachOMachineType);
|
procedure SetMachineType(const aMachineType : TMachOMachineType);
|
||||||
|
procedure SetSubMachineType(const aSubMachineType: TMachoSubMachineType);
|
||||||
protected
|
protected
|
||||||
function GetExtensions : string; override;
|
function GetExtensions : string; override;
|
||||||
function GetDescription : string; override;
|
function GetDescription : string; override;
|
||||||
@ -50,6 +61,7 @@ type
|
|||||||
constructor Create; override;
|
constructor Create; override;
|
||||||
destructor Destroy; override;
|
destructor Destroy; override;
|
||||||
property MachineType : TMachOMachineType read fMachineType write SetMachineType;
|
property MachineType : TMachOMachineType read fMachineType write SetMachineType;
|
||||||
|
property SubMachineType : TMachOSubMachineType read fSubMachineType write SetSubMachineType;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
implementation
|
implementation
|
||||||
@ -115,6 +127,7 @@ type
|
|||||||
fParent : TMachOResourceWriter;
|
fParent : TMachOResourceWriter;
|
||||||
fOppositeEndianess : boolean;
|
fOppositeEndianess : boolean;
|
||||||
fMachineType : TMachOMachineType;
|
fMachineType : TMachOMachineType;
|
||||||
|
fSubMachineType: TMachoSubMachineType;
|
||||||
fDataAlignment : integer;
|
fDataAlignment : integer;
|
||||||
fSectAlignment : integer;
|
fSectAlignment : integer;
|
||||||
fSegType : longword;
|
fSegType : longword;
|
||||||
@ -154,7 +167,8 @@ type
|
|||||||
procedure Write(aResources: TResources; aStream: TStream);
|
procedure Write(aResources: TResources; aStream: TStream);
|
||||||
public
|
public
|
||||||
constructor Create(aParent : TMachOResourceWriter; const aMachineType
|
constructor Create(aParent : TMachOResourceWriter; const aMachineType
|
||||||
: TMachOMachineType; const aOppositeEndianess : boolean); virtual;
|
: TMachOMachineType; const aSubMachineType: TMachoSubMachineType;
|
||||||
|
const aOppositeEndianess : boolean); virtual;
|
||||||
destructor Destroy; override;
|
destructor Destroy; override;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
@ -469,33 +483,41 @@ begin
|
|||||||
end;
|
end;
|
||||||
|
|
||||||
procedure TAbstractMachOSubWriter.FixHeader(aStream: TStream);
|
procedure TAbstractMachOSubWriter.FixHeader(aStream: TStream);
|
||||||
|
const
|
||||||
|
ppcsm2int: array[TMachOSubMachineTypePowerPC] of longint = (CPU_SUBTYPE_POWERPC_ALL);
|
||||||
|
ppc64sm2int: array[TMachOSubMachineTypePowerPC64] of longint = (CPU_SUBTYPE_POWERPC_ALL);
|
||||||
|
i386sm2int: array[TMachOSubMachineType386] of longint = (CPU_SUBTYPE_I386_ALL);
|
||||||
|
x86_64sm2int: array[TMachOSubMachineTypex64] of longint = (CPU_SUBTYPE_X86_64_ALL);
|
||||||
|
armsm2int: array[TMachOSubMachineTypeArm] of longint = (CPU_SUBTYPE_ARM_ALL,
|
||||||
|
CPU_SUBTYPE_ARM_V4T,CPU_SUBTYPE_ARM_V6,CPU_SUBTYPE_ARM_V5TEJ,
|
||||||
|
CPU_SUBTYPE_ARM_XSCALE,CPU_SUBTYPE_ARM_V7);
|
||||||
begin
|
begin
|
||||||
aStream.Position:=0;
|
aStream.Position:=0;
|
||||||
case fMachineType of
|
case fMachineType of
|
||||||
mmtpowerpc : begin
|
mmtpowerpc : begin
|
||||||
fHeader.magic:=MH_MAGIC;
|
fHeader.magic:=MH_MAGIC;
|
||||||
fHeader.cputype:=CPU_TYPE_POWERPC;
|
fHeader.cputype:=CPU_TYPE_POWERPC;
|
||||||
fHeader.cpusubtype:=CPU_SUBTYPE_POWERPC_ALL;
|
fHeader.cpusubtype:=ppcsm2int[fSubMachineType.fPpcSubType];
|
||||||
end;
|
end;
|
||||||
mmtpowerpc64 : begin
|
mmtpowerpc64 : begin
|
||||||
fHeader.magic:=MH_MAGIC_64;
|
fHeader.magic:=MH_MAGIC_64;
|
||||||
fHeader.cputype:=CPU_TYPE_POWERPC64;
|
fHeader.cputype:=CPU_TYPE_POWERPC64;
|
||||||
fHeader.cpusubtype:=CPU_SUBTYPE_POWERPC_ALL;
|
fHeader.cpusubtype:=ppc64sm2int[fSubMachineType.fPpc64SubType];
|
||||||
end;
|
end;
|
||||||
mmti386 : begin
|
mmti386 : begin
|
||||||
fHeader.magic:=MH_MAGIC;
|
fHeader.magic:=MH_MAGIC;
|
||||||
fHeader.cputype:=CPU_TYPE_I386;
|
fHeader.cputype:=CPU_TYPE_I386;
|
||||||
fHeader.cpusubtype:=CPU_SUBTYPE_I386_ALL;
|
fHeader.cpusubtype:=i386sm2int[fSubMachineType.f386SubType];
|
||||||
end;
|
end;
|
||||||
mmtx86_64 : begin
|
mmtx86_64 : begin
|
||||||
fHeader.magic:=MH_MAGIC_64;
|
fHeader.magic:=MH_MAGIC_64;
|
||||||
fHeader.cputype:=CPU_TYPE_X86_64;
|
fHeader.cputype:=CPU_TYPE_X86_64;
|
||||||
fHeader.cpusubtype:=CPU_SUBTYPE_X86_64_ALL;
|
fHeader.cpusubtype:=x86_64sm2int[fSubMachineType.fX64SubType];
|
||||||
end;
|
end;
|
||||||
mmtarm : begin
|
mmtarm : begin
|
||||||
fHeader.magic:=MH_MAGIC;
|
fHeader.magic:=MH_MAGIC;
|
||||||
fHeader.cputype:=CPU_TYPE_ARM;
|
fHeader.cputype:=CPU_TYPE_ARM;
|
||||||
fHeader.cpusubtype:=CPU_SUBTYPE_ARM_ALL;
|
fHeader.cpusubtype:=armsm2int[fSubMachineType.fArmSubType];
|
||||||
end;
|
end;
|
||||||
end;
|
end;
|
||||||
fHeader.filetype:=MH_OBJECT;
|
fHeader.filetype:=MH_OBJECT;
|
||||||
@ -541,10 +563,12 @@ begin
|
|||||||
end;
|
end;
|
||||||
|
|
||||||
constructor TAbstractMachOSubWriter.Create(aParent : TMachOResourceWriter;
|
constructor TAbstractMachOSubWriter.Create(aParent : TMachOResourceWriter;
|
||||||
const aMachineType : TMachOMachineType; const aOppositeEndianess : boolean);
|
const aMachineType : TMachOMachineType; const aSubMachineType:
|
||||||
|
TMachoSubMachineType; const aOppositeEndianess : boolean);
|
||||||
begin
|
begin
|
||||||
fParent:=aParent;
|
fParent:=aParent;
|
||||||
fMachineType:=aMachineType;
|
fMachineType:=aMachineType;
|
||||||
|
fSubMachineType:=aSubMachineType;
|
||||||
fOppositeEndianess:=aOppositeEndianess;
|
fOppositeEndianess:=aOppositeEndianess;
|
||||||
fRoot:=nil;
|
fRoot:=nil;
|
||||||
fMachOStringTable:=TObjectStringTable.Create(nil,0);
|
fMachOStringTable:=TObjectStringTable.Create(nil,0);
|
||||||
@ -570,8 +594,7 @@ begin
|
|||||||
{$INCLUDE machodefaulttarget.inc}
|
{$INCLUDE machodefaulttarget.inc}
|
||||||
end;
|
end;
|
||||||
|
|
||||||
procedure TMachOResourceWriter.SetMachineType(
|
procedure TMachOResourceWriter.SetMachineType(const aMachineType: TMachOMachineType);
|
||||||
const aMachineType: TMachOMachineType);
|
|
||||||
begin
|
begin
|
||||||
case aMachineType of
|
case aMachineType of
|
||||||
mmtpowerpc : begin fBits:=MACH_32BIT; fEndianess:=MACH_BIG_ENDIAN; end;
|
mmtpowerpc : begin fBits:=MACH_32BIT; fEndianess:=MACH_BIG_ENDIAN; end;
|
||||||
@ -584,6 +607,11 @@ begin
|
|||||||
fOppositeEndianess:=fNativeEndianess<>fEndianess;
|
fOppositeEndianess:=fNativeEndianess<>fEndianess;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
procedure TMachOResourceWriter.SetSubMachineType(const aSubMachineType: TMachoSubMachineType);
|
||||||
|
begin
|
||||||
|
fSubMachineType:=aSubMachineType;
|
||||||
|
end;
|
||||||
|
|
||||||
function TMachOResourceWriter.GetExtensions: string;
|
function TMachOResourceWriter.GetExtensions: string;
|
||||||
begin
|
begin
|
||||||
Result:=fExtensions;
|
Result:=fExtensions;
|
||||||
@ -598,8 +626,8 @@ procedure TMachOResourceWriter.Write(aResources: TResources; aStream: TStream);
|
|||||||
var subwriter : TAbstractMachOSubWriter;
|
var subwriter : TAbstractMachOSubWriter;
|
||||||
begin
|
begin
|
||||||
case fBits of
|
case fBits of
|
||||||
MACH_32BIT : subwriter:=TMachO32SubWriter.Create(self,fMachineType,fOppositeEndianess);
|
MACH_32BIT : subwriter:=TMachO32SubWriter.Create(self,fMachineType,fSubMachineType,fOppositeEndianess);
|
||||||
MACH_64BIT : subwriter:=TMachO64SubWriter.Create(self,fMachineType,fOppositeEndianess)
|
MACH_64BIT : subwriter:=TMachO64SubWriter.Create(self,fMachineType,fSubMachineType,fOppositeEndianess)
|
||||||
else
|
else
|
||||||
raise EMachOResourceWriterUnknownBitSizeException.Create('');
|
raise EMachOResourceWriterUnknownBitSizeException.Create('');
|
||||||
end;
|
end;
|
||||||
|
@ -62,20 +62,23 @@ begin
|
|||||||
writeln('Syntax: '+progname+' [options] <inputfile> [<inputfile>...] [-o <outputfile>]');
|
writeln('Syntax: '+progname+' [options] <inputfile> [<inputfile>...] [-o <outputfile>]');
|
||||||
writeln;
|
writeln;
|
||||||
writeln('Options:');
|
writeln('Options:');
|
||||||
writeln(' --help, -h, -? Show this screen.');
|
writeln(' --help, -h, -? Show this screen.');
|
||||||
writeln(' --version, -V Show program version.');
|
writeln(' --version, -V Show program version.');
|
||||||
writeln(' --verbose, -v Be verbose.');
|
writeln(' --verbose, -v Be verbose.');
|
||||||
writeln(' --input, -i <x> Ignored for compatibility.');
|
writeln(' --input, -i <x> Ignored for compatibility.');
|
||||||
writeln(' --output, -o <x> Set the output file name.');
|
writeln(' --output, -o <x> Set the output file name.');
|
||||||
writeln(' -of <format> Set the output file format. Supported formats:');
|
writeln(' -of <format> Set the output file format. Supported formats:');
|
||||||
writeln(' res, elf, coff, mach-o, external');
|
writeln(' res, elf, coff, mach-o, external');
|
||||||
writeln(' --arch, -a <name> Set object file architecture. Supported architectures:');
|
writeln(' --arch, -a <name> Set object file architecture. Supported architectures:');
|
||||||
writeln(' i386, x86_64, arm (coff)');
|
writeln(' i386, x86_64, arm, arm (coff)');
|
||||||
writeln(' i386, x86_64, powerpc, powerpc64, arm, armeb, m68k,');
|
writeln(' i386, x86_64, powerpc, powerpc64, arm, armeb, m68k,');
|
||||||
writeln(' sparc, alpha, ia64 (elf)');
|
writeln(' sparc, alpha, ia64 (elf)');
|
||||||
writeln(' i386, x86_64, powerpc, powerpc64 (mach-o)');
|
writeln(' i386, x86_64, powerpc, powerpc64 (mach-o)');
|
||||||
writeln(' bigendian, littleendian (external)');
|
writeln(' bigendian, littleendian (external)');
|
||||||
writeln(' @<file> Read more options from file <file>');
|
writeln(' --subarch, -s <name> Set object file sub-architecture. Supported values:');
|
||||||
|
writeln(' arm: all, v4t, v6, v5tej, xscale, v7');
|
||||||
|
writeln(' other architectures: all');
|
||||||
|
writeln(' @<file> Read more options from file <file>');
|
||||||
writeln('Default output target: '+TargetToStr(currenttarget));
|
writeln('Default output target: '+TargetToStr(currenttarget));
|
||||||
end;
|
end;
|
||||||
|
|
||||||
@ -112,9 +115,16 @@ begin
|
|||||||
if params.Target.machine=mtNone then
|
if params.Target.machine=mtNone then
|
||||||
begin
|
begin
|
||||||
if not (CurrentTarget.machine in ObjFormats[CurrentTarget.objformat].machines) then
|
if not (CurrentTarget.machine in ObjFormats[CurrentTarget.objformat].machines) then
|
||||||
CurrentTarget.machine:=GetDefaultMachineForFormat(CurrentTarget.objformat);
|
begin
|
||||||
|
CurrentTarget.machine:=GetDefaultMachineForFormat(CurrentTarget.objformat);
|
||||||
|
CurrentTarget.submachine:=GetDefaultSubMachineForMachine(currentTarget.machine);
|
||||||
|
end
|
||||||
end
|
end
|
||||||
else CurrentTarget.machine:=params.Target.machine;
|
else
|
||||||
|
begin
|
||||||
|
CurrentTarget.machine:=params.Target.machine;
|
||||||
|
CurrentTarget.submachine:=params.Target.submachine;
|
||||||
|
end;
|
||||||
|
|
||||||
if not (CurrentTarget.machine in ObjFormats[CurrentTarget.objformat].machines) then
|
if not (CurrentTarget.machine in ObjFormats[CurrentTarget.objformat].machines) then
|
||||||
begin
|
begin
|
||||||
@ -255,16 +265,42 @@ begin
|
|||||||
end;
|
end;
|
||||||
|
|
||||||
function SetUpMachOWriter : TMachOResourceWriter;
|
function SetUpMachOWriter : TMachOResourceWriter;
|
||||||
|
const
|
||||||
|
ArmSubMachine2MachOSubMachine: array[TSubMachineTypeArm] of TMachOSubMachineTypeArm =
|
||||||
|
(msmarm_all,msmarm_v4t,msmarm_v6,msmarm_v5tej,msmarm_xscale,msmarm_v7);
|
||||||
|
var
|
||||||
|
MachOSubMachineType: TMachoSubMachineType;
|
||||||
begin
|
begin
|
||||||
Result:=TMachOResourceWriter.Create;
|
Result:=TMachOResourceWriter.Create;
|
||||||
case CurrentTarget.machine of
|
case CurrentTarget.machine of
|
||||||
// mtnone :
|
// mtnone :
|
||||||
mti386 : Result.MachineType:=mmti386;
|
mti386 :
|
||||||
mtx86_64 : Result.MachineType:=mmtx86_64;
|
begin
|
||||||
mtppc : Result.MachineType:=mmtpowerpc;
|
Result.MachineType:=mmti386;
|
||||||
mtppc64 : Result.MachineType:=mmtpowerpc64;
|
MachOSubMachineType.f386SubType:=msm386_all;
|
||||||
mtarm : Result.MachineType:=mmtarm;
|
end;
|
||||||
|
mtx86_64 :
|
||||||
|
begin
|
||||||
|
Result.MachineType:=mmtx86_64;
|
||||||
|
MachOSubMachineType.fX64SubType:=msmx64_all;
|
||||||
|
end;
|
||||||
|
mtppc :
|
||||||
|
begin
|
||||||
|
Result.MachineType:=mmtpowerpc;
|
||||||
|
MachOSubMachineType.fPpcSubType:=msmppc_all;
|
||||||
|
end;
|
||||||
|
mtppc64 :
|
||||||
|
begin
|
||||||
|
Result.MachineType:=mmtpowerpc64;
|
||||||
|
MachOSubMachineType.fPpc64SubType:=msmppc64_all;
|
||||||
|
end;
|
||||||
|
mtarm :
|
||||||
|
begin
|
||||||
|
Result.MachineType:=mmtarm;
|
||||||
|
MachOSubMachineType.fArmSubType:=ArmSubMachine2MachOSubMachine[CurrentTarget.submachine.subarm];
|
||||||
|
end;
|
||||||
end;
|
end;
|
||||||
|
Result.SubMachineType:=MachOSubMachineType;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
|
||||||
|
@ -30,6 +30,7 @@ type
|
|||||||
EArgumentMissingException = class(EParametersException);
|
EArgumentMissingException = class(EParametersException);
|
||||||
EUnknownObjFormatException = class(EParametersException);
|
EUnknownObjFormatException = class(EParametersException);
|
||||||
EUnknownMachineException = class(EParametersException);
|
EUnknownMachineException = class(EParametersException);
|
||||||
|
EUnknownSubMachineException = class(EParametersException);
|
||||||
ECannotReadConfFile = class(EParametersException);
|
ECannotReadConfFile = class(EParametersException);
|
||||||
|
|
||||||
type
|
type
|
||||||
@ -49,6 +50,7 @@ type
|
|||||||
procedure ParseOutputFile(aList : TStringList; var index : integer; const parname : string);
|
procedure ParseOutputFile(aList : TStringList; var index : integer; const parname : string);
|
||||||
procedure ParseOutputFormat(aList : TStringList; var index : integer; const parname : string);
|
procedure ParseOutputFormat(aList : TStringList; var index : integer; const parname : string);
|
||||||
procedure ParseArchitecture(aList : TStringList; var index : integer; const parname : string);
|
procedure ParseArchitecture(aList : TStringList; var index : integer; const parname : string);
|
||||||
|
procedure ParseSubArchitecture(aList : TStringList; var index : integer; const parname : string);
|
||||||
procedure ParseConfigFile(aList : TStringList; var index : integer; const parname : string);
|
procedure ParseConfigFile(aList : TStringList; var index : integer; const parname : string);
|
||||||
function DoOptionalArgument(aList : TStringList; const i : integer) : string;
|
function DoOptionalArgument(aList : TStringList; const i : integer) : string;
|
||||||
function DoMandatoryArgument(aList : TStringList; const i : integer) : string;
|
function DoMandatoryArgument(aList : TStringList; const i : integer) : string;
|
||||||
@ -242,6 +244,7 @@ begin
|
|||||||
if Machines[aMachine].name=tmp then
|
if Machines[aMachine].name=tmp then
|
||||||
begin
|
begin
|
||||||
fTarget.machine:=aMachine;
|
fTarget.machine:=aMachine;
|
||||||
|
fTarget.submachine:=GetDefaultSubMachineForMachine(fTarget.machine);
|
||||||
exit;
|
exit;
|
||||||
end;
|
end;
|
||||||
end;
|
end;
|
||||||
@ -250,6 +253,37 @@ begin
|
|||||||
|
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
procedure TParameters.ParseSubArchitecture(aList: TStringList; var index: integer; const parname: string);
|
||||||
|
var tmp : string;
|
||||||
|
aSubMachineArm : TSubMachineTypeArm;
|
||||||
|
aSubMachineGeneric : TSubMachineTypeGeneric;
|
||||||
|
begin
|
||||||
|
inc(index);
|
||||||
|
tmp:=DoMandatoryArgument(aList,index);
|
||||||
|
if tmp='' then
|
||||||
|
raise EArgumentMissingException.Create(parname);
|
||||||
|
|
||||||
|
case fTarget.machine of
|
||||||
|
mtarm,mtarmeb:
|
||||||
|
for aSubMachineArm:=low(TSubMachineTypeArm) to high(TSubMachineTypeArm) do
|
||||||
|
if SubMachinesArm[aSubMachineArm]=tmp then
|
||||||
|
begin
|
||||||
|
ftarget.submachine.subarm:=aSubMachineArm;
|
||||||
|
exit;
|
||||||
|
end;
|
||||||
|
else
|
||||||
|
for aSubMachineGeneric:=low(TSubMachineTypeGeneric) to high(TSubMachineTypeGeneric) do
|
||||||
|
if SubMachinesGen[aSubMachineGeneric]=tmp then
|
||||||
|
begin
|
||||||
|
ftarget.submachine.subgen:=aSubMachineGeneric;
|
||||||
|
exit;
|
||||||
|
end;
|
||||||
|
end;
|
||||||
|
|
||||||
|
raise EUnknownSubMachineException.Create(tmp);
|
||||||
|
|
||||||
|
end;
|
||||||
|
|
||||||
procedure TParameters.ParseConfigFile(aList: TStringList; var index: integer;
|
procedure TParameters.ParseConfigFile(aList: TStringList; var index: integer;
|
||||||
const parname : string);
|
const parname : string);
|
||||||
var tmp : string;
|
var tmp : string;
|
||||||
@ -333,6 +367,8 @@ begin
|
|||||||
ParseOutputFormat(fList,i,tmp)
|
ParseOutputFormat(fList,i,tmp)
|
||||||
else if ((tmp='-a') or (tmp='--arch')) then
|
else if ((tmp='-a') or (tmp='--arch')) then
|
||||||
ParseArchitecture(fList,i,tmp)
|
ParseArchitecture(fList,i,tmp)
|
||||||
|
else if ((tmp='-s') or (tmp='--subarch')) then
|
||||||
|
ParseSubArchitecture(fList,i,tmp)
|
||||||
else
|
else
|
||||||
raise EUnknownParameterException.Create(tmp);
|
raise EUnknownParameterException.Create(tmp);
|
||||||
end
|
end
|
||||||
@ -356,6 +392,7 @@ begin
|
|||||||
fInputFiles:=TStringList.Create;
|
fInputFiles:=TStringList.Create;
|
||||||
fOutputFile:='';
|
fOutputFile:='';
|
||||||
fTarget.machine:=mtnone;
|
fTarget.machine:=mtnone;
|
||||||
|
GetDefaultSubMachineForMachine(fTarget.machine);
|
||||||
fTarget.objformat:=ofnone;
|
fTarget.objformat:=ofnone;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
@ -25,6 +25,18 @@ type
|
|||||||
mtsparc,mtalpha,mtia64,mtBigEndian,mtLittleEndian);
|
mtsparc,mtalpha,mtia64,mtBigEndian,mtLittleEndian);
|
||||||
TMachineTypes = set of TMachineType;
|
TMachineTypes = set of TMachineType;
|
||||||
|
|
||||||
|
TSubMachineTypeArm = (smtarm_all,smtarm_v4t,smtarm_v6,smtarm_v5tej,smtarm_xscale,smtarm_v7);
|
||||||
|
TSubMachineTypeGeneric = (smtgen_all);
|
||||||
|
|
||||||
|
TSubMachineType = record
|
||||||
|
case TMachineType of
|
||||||
|
mtarm,mtarmeb:
|
||||||
|
(subarm: TSubMachineTypeArm);
|
||||||
|
mtnone, mti386,mtx86_64,mtppc,mtppc64,mtm68k,
|
||||||
|
mtsparc,mtalpha,mtia64,mtBigEndian,mtLittleEndian:
|
||||||
|
(subgen: TSubMachineTypeGeneric);
|
||||||
|
end;
|
||||||
|
|
||||||
TObjFormat = (ofNone, ofRes, ofElf, ofCoff, ofMachO, ofExt);
|
TObjFormat = (ofNone, ofRes, ofElf, ofCoff, ofMachO, ofExt);
|
||||||
TObjFormats = set of TObjFormat;
|
TObjFormats = set of TObjFormat;
|
||||||
|
|
||||||
@ -42,10 +54,12 @@ type
|
|||||||
|
|
||||||
TResTarget = record
|
TResTarget = record
|
||||||
machine : TMachineType;
|
machine : TMachineType;
|
||||||
|
submachine : TSubMachineType;
|
||||||
objformat : TObjFormat;
|
objformat : TObjFormat;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
function GetDefaultMachineForFormat(aFormat : TObjFormat) : TMachineType;
|
function GetDefaultMachineForFormat(aFormat : TObjFormat) : TMachineType;
|
||||||
|
function GetDefaultSubMachineForMachine(aMachine: TMachineType) : TSubMachineType;
|
||||||
function TargetToStr(const aTarget : TResTarget) : string;
|
function TargetToStr(const aTarget : TResTarget) : string;
|
||||||
function MachineToStr(const aMachine : TMachineType) : string;
|
function MachineToStr(const aMachine : TMachineType) : string;
|
||||||
function ObjFormatToStr(const aFormat : TObjFormat) : string;
|
function ObjFormatToStr(const aFormat : TObjFormat) : string;
|
||||||
@ -68,6 +82,11 @@ var
|
|||||||
(name : 'littleendian'; formats : [ofExt]) //mtLittleEndian
|
(name : 'littleendian'; formats : [ofExt]) //mtLittleEndian
|
||||||
);
|
);
|
||||||
|
|
||||||
|
SubMachinesArm: array[TSubMachineTypeArm] of string[8] =
|
||||||
|
('all','armv4','armv6','armv5tej','xscale','armv7');
|
||||||
|
SubMachinesGen: array[TSubMachineTypeGeneric] of string[3] =
|
||||||
|
('all');
|
||||||
|
|
||||||
ObjFormats : array[TObjFormat] of TFormatInfo =
|
ObjFormats : array[TObjFormat] of TFormatInfo =
|
||||||
(
|
(
|
||||||
(name : ''; ext : ''; machines : []),
|
(name : ''; ext : ''; machines : []),
|
||||||
@ -87,36 +106,47 @@ var
|
|||||||
(
|
(
|
||||||
{$IFDEF CPUI386}
|
{$IFDEF CPUI386}
|
||||||
machine : mti386;
|
machine : mti386;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUX86_64}
|
{$IFDEF CPUX86_64}
|
||||||
machine : mtx86_64;
|
machine : mtx86_64;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUPOWERPC32}
|
{$IFDEF CPUPOWERPC32}
|
||||||
machine : mtppc;
|
machine : mtppc;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUPOWERPC64}
|
{$IFDEF CPUPOWERPC64}
|
||||||
machine : mtppc64;
|
machine : mtppc64;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUARM}
|
{$IFDEF CPUARM}
|
||||||
{$IFDEF ENDIAN_LITTLE}
|
{$IFDEF ENDIAN_LITTLE}
|
||||||
machine : mtarm;
|
machine : mtarm;
|
||||||
|
submachine : (subarm: smtarm_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
machine : mtarmeb;
|
machine : mtarmeb;
|
||||||
|
submachine : (subarm: smtarm_all);
|
||||||
{$ENDIF}
|
{$ENDIF}
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPU68K}
|
{$IFDEF CPU68K}
|
||||||
machine : mtm68k;
|
machine : mtm68k;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUSPARC}
|
{$IFDEF CPUSPARC}
|
||||||
machine : mtsparc;
|
machine : mtsparc;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUALPHA}
|
{$IFDEF CPUALPHA}
|
||||||
machine : mtalpha;
|
machine : mtalpha;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
{$IFDEF CPUIA64}
|
{$IFDEF CPUIA64}
|
||||||
machine : mtia64;
|
machine : mtia64;
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ELSE}
|
{$ELSE}
|
||||||
machine : mti386; //default i386
|
machine : mti386; //default i386
|
||||||
|
submachine : (subgen: smtgen_all);
|
||||||
{$ENDIF}
|
{$ENDIF}
|
||||||
{$ENDIF}
|
{$ENDIF}
|
||||||
{$ENDIF}
|
{$ENDIF}
|
||||||
@ -162,18 +192,43 @@ begin
|
|||||||
Result:=Machines[aMachine].name;
|
Result:=Machines[aMachine].name;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
function SubMachineToStr(const aMachine : TMachineType; const aSubMachine : TSubMachineType) : string;
|
||||||
|
begin
|
||||||
|
case aMachine of
|
||||||
|
mtarm,mtarmeb:
|
||||||
|
result:=SubMachinesArm[aSubMachine.subarm];
|
||||||
|
else
|
||||||
|
// no need to confuse people with the "all" suffix, it doesn't do
|
||||||
|
// anything anyway
|
||||||
|
result:='';
|
||||||
|
end;
|
||||||
|
end;
|
||||||
|
|
||||||
function ObjFormatToStr(const aFormat : TObjFormat) : string;
|
function ObjFormatToStr(const aFormat : TObjFormat) : string;
|
||||||
begin
|
begin
|
||||||
Result:=ObjFormats[aFormat].name;
|
Result:=ObjFormats[aFormat].name;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
function GetDefaultSubMachineForMachine(aMachine: TMachineType): TSubMachineType;
|
||||||
|
begin
|
||||||
|
case aMachine of
|
||||||
|
mtarm,mtarmeb:
|
||||||
|
result.subarm:=smtarm_all;
|
||||||
|
else
|
||||||
|
result.subgen:=smtgen_all;
|
||||||
|
end;
|
||||||
|
end;
|
||||||
|
|
||||||
function TargetToStr(const aTarget : TResTarget) : string;
|
function TargetToStr(const aTarget : TResTarget) : string;
|
||||||
var s1, s2 : string;
|
var s1, s2, s3 : string;
|
||||||
begin
|
begin
|
||||||
s1:=MachineToStr(aTarget.machine);
|
s1:=MachineToStr(aTarget.machine);
|
||||||
s2:=ObjFormatToStr(aTarget.objformat);
|
s2:=ObjFormatToStr(aTarget.objformat);
|
||||||
|
s3:=SubMachineToStr(aTarget.Machine,aTarget.submachine);
|
||||||
if (s1='') or (s2='') then Result:=s1+s2
|
if (s1='') or (s2='') then Result:=s1+s2
|
||||||
else Result:=s1+' - '+s2;
|
else Result:=s1+' - '+s2;
|
||||||
|
if s3<>'' then
|
||||||
|
Result:=Result+'-'+s3;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
end.
|
end.
|
||||||
|
Loading…
Reference in New Issue
Block a user