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https://gitlab.com/freepascal.org/fpc/source.git
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* various fixes and optimizations
This commit is contained in:
Jonas Maebe
parent
bfbf0ea7c6
commit
ee7d5f7b2a
@ -96,7 +96,8 @@ unit cgcpu;
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procedure g_restore_standard_registers(list : taasmoutput);override;
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procedure g_save_all_registers(list : taasmoutput);override;
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procedure g_restore_all_registers(list : taasmoutput;selfused,accused,acchiused:boolean);override;
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private
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private
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procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
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@ -106,7 +107,15 @@ unit cgcpu;
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{ Make sure ref is a valid reference for the PowerPC and sets the }
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{ base to the value of the index if (base = R_NO). }
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procedure fixref(list: taasmoutput; var ref: treference);
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{ Returns true if the reference contained a base, index and an }
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{ offset or symbol, in which case the base will have been changed }
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{ to a tempreg (which has to be freed by the caller) containing }
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{ the sum of part of the original reference }
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function fixref(list: taasmoutput; var ref: treference): boolean;
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{ returns whether a reference can be used immediately in a powerpc }
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{ instruction }
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function issimpleref(const ref: treference): boolean;
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{ contains the common code of a_load_reg_ref and a_load_ref_reg }
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procedure a_load_store(list:taasmoutput;op: tasmop;reg:tregister;
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@ -153,7 +162,7 @@ const
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begin
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case locpara.loc of
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LOC_REGISTER:
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LOC_REGISTER,LOC_CREGISTER:
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a_load_const_reg(list,size,a,locpara.register);
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LOC_REFERENCE:
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begin
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@ -178,7 +187,7 @@ const
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begin
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case locpara.loc of
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LOC_REGISTER:
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LOC_REGISTER,LOC_CREGISTER:
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a_load_ref_reg(list,size,r,locpara.register);
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LOC_REFERENCE:
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begin
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@ -190,7 +199,7 @@ const
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a_load_reg_ref(list,size,tmpreg,ref);
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free_scratch_reg(list,tmpreg);
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end;
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LOC_FPUREGISTER:
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LOC_FPUREGISTER,LOC_CFPUREGISTER:
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case size of
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OS_32:
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a_loadfpu_ref_reg(list,OS_F32,r,locpara.register);
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@ -215,7 +224,7 @@ const
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begin
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case locpara.loc of
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LOC_REGISTER:
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LOC_REGISTER,LOC_CREGISTER:
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a_loadaddr_ref_reg(list,r,locpara.register);
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LOC_REFERENCE:
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begin
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@ -266,7 +275,8 @@ const
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else if ((a and $ffff) <> 0) then
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begin
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list.concat(taicpu.op_reg_const(A_LI,reg,smallint(a and $ffff)));
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if ((a shr 16) <> 0) then
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if ((a shr 16) <> 0) or
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(smallint(a and $ffff) < 0) then
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list.concat(taicpu.op_reg_const(A_ADDIS,reg,
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smallint((a shr 16)+ord(smallint(a and $ffff) < 0))))
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end
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@ -286,10 +296,10 @@ const
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var
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op: TAsmOp;
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ref2: TReference;
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freereg: boolean;
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begin
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ref2 := ref;
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FixRef(list,ref2);
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freereg := fixref(list,ref2);
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if size in [OS_S8..OS_S16] then
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{ storing is the same for signed and unsigned values }
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size := tcgsize(ord(size)-(ord(OS_S8)-ord(OS_8)));
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@ -298,6 +308,8 @@ const
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internalerror(200109236);
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op := storeinstr[tcgsize2unsigned[size],ref2.index<>R_NO,false];
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a_load_store(list,op,reg,ref2);
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if freereg then
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cg.free_scratch_reg(list,ref2.base);
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End;
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@ -319,12 +331,15 @@ const
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op: tasmop;
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tmpreg: tregister;
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ref2, tmpref: treference;
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freereg: boolean;
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begin
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ref2 := ref;
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fixref(list,ref2);
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freereg := fixref(list,ref2);
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op := loadinstr[size,ref2.index<>R_NO,false];
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a_load_store(list,op,reg,ref2);
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if freereg then
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free_scratch_reg(list,ref2.base);
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{ sign extend shortint if necessary, since there is no }
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{ load instruction that does that automatically (JM) }
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if size = OS_S8 then
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@ -366,7 +381,7 @@ const
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procedure tcgppc.a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister);
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begin
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list.concat(taicpu.op_reg_reg(A_FMR,reg1,reg2));
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list.concat(taicpu.op_reg_reg(A_FMR,reg2,reg1));
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end;
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procedure tcgppc.a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister);
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@ -379,6 +394,8 @@ const
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var
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op: tasmop;
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ref2: treference;
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freereg: boolean;
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begin
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{ several functions call this procedure with OS_32 or OS_64 }
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{ so this makes life easier (FK) }
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@ -391,9 +408,11 @@ const
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internalerror(200201121);
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end;
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ref2 := ref;
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fixref(list,ref2);
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freereg := fixref(list,ref2);
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op := fpuloadinstr[size,ref2.index <> R_NO,false];
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a_load_store(list,op,reg,ref2);
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if freereg then
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cg.free_scratch_reg(list,ref2.base);
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end;
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procedure tcgppc.a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference);
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@ -406,13 +425,17 @@ const
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var
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op: tasmop;
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ref2: treference;
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freereg: boolean;
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begin
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if not(size in [OS_F32,OS_F64]) then
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internalerror(200201122);
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ref2 := ref;
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fixref(list,ref2);
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freereg := fixref(list,ref2);
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op := fpustoreinstr[size,ref2.index <> R_NO,false];
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a_load_store(list,op,reg,ref2);
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if freereg then
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cg.free_scratch_reg(list,ref2.base);
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end;
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@ -465,7 +488,7 @@ const
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ophi := TOpCG2AsmOpConstHi[op];
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oplo := TOpCG2AsmOpConstLo[op];
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gotrlwi := get_rlwi_const(a,l1,l2);
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if (op in [OP_ADD,OP_AND,OP_OR,OP_XOR]) then
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if (op in [OP_AND,OP_OR,OP_XOR]) then
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begin
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if (a = 0) then
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begin
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@ -473,8 +496,7 @@ const
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list.concat(taicpu.op_reg_const(A_LI,dst,0));
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exit;
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end
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else if (a = high(aword)) and
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(op in [OP_AND,OP_OR,OP_XOR]) then
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else if (a = high(aword)) then
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begin
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case op of
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OP_OR:
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@ -484,15 +506,11 @@ const
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end;
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exit;
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end
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else if (longint(a) >= 0) and
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(longint(a) <= high(word)) and
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else if (a <= high(word)) and
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((op <> OP_AND) or
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not gotrlwi) then
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begin
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if (op = OP_ADD) then
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list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)))
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else
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list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
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list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
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exit;
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end;
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{ all basic constant instructions also have a shifted form that }
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@ -505,15 +523,58 @@ const
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list.concat(taicpu.op_reg_reg_const(ophi,dst,src,word(a shr 16)));
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exit;
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end;
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end;
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end
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else if (op = OP_ADD) then
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if a = 0 then
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exit
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else if (longint(a) >= low(smallint)) and
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(longint(a) <= high(smallint)) then
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begin
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list.concat(taicpu.op_reg_reg_const(A_ADDI,dst,src,smallint(a)));
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exit;
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end;
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{ otherwise, the instructions we can generate depend on the }
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{ operation }
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useReg := false;
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case op of
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OP_DIV,OP_IDIV:
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useReg := true;
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if (a = 0) then
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internalerror(200208103)
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else if (a = 1) then
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begin
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a_load_reg_reg(list,OS_INT,src,dst);
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exit
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end
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else if ispowerof2(a,l1) then
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begin
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case op of
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OP_DIV:
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list.concat(taicpu.op_reg_reg_const(A_SRWI,dst,src,l1));
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OP_IDIV:
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begin
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list.concat(taicpu.op_reg_reg_const(A_SRAWI,dst,src,l1));
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list.concat(taicpu.op_reg_reg(A_ADDZE,dst,dst));
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end;
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end;
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exit;
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end
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else
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usereg := true;
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OP_IMUL, OP_MUL:
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if (longint(a) >= low(smallint)) and
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if (a = 0) then
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begin
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list.concat(taicpu.op_reg_const(A_LI,dst,0));
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exit
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end
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else if (a = 1) then
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begin
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a_load_reg_reg(list,OS_INT,src,dst);
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exit
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end
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else if ispowerof2(a,l1) then
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list.concat(taicpu.op_reg_reg_const(A_SLWI,dst,src,l1))
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else if (longint(a) >= low(smallint)) and
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(longint(a) <= high(smallint)) then
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list.concat(taicpu.op_reg_reg_const(A_MULLI,dst,src,smallint(a)))
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else
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@ -1090,10 +1151,11 @@ const
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var
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ref2, tmpref: treference;
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freereg: boolean;
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begin
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ref2 := ref;
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FixRef(list,ref2);
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freereg := fixref(list,ref2);
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if assigned(ref2.symbol) then
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{ add the symbol's value to the base of the reference, and if the }
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{ reference doesn't have a base, create one }
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@ -1103,8 +1165,15 @@ const
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tmpref.symbol := ref2.symbol;
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tmpref.symaddr := refs_ha;
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if ref2.base <> R_NO then
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list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
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ref2.base,tmpref))
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begin
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list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
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ref2.base,tmpref));
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if freereg then
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begin
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cg.free_scratch_reg(list,ref2.base);
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freereg := false;
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end;
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end
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else
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list.concat(taicpu.op_reg_ref(A_LIS,r,tmpref));
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tmpref.base := R_NO;
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@ -1124,6 +1193,8 @@ const
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else if (ref2.base <> R_NO) and
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(r <> ref2.base) then
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list.concat(taicpu.op_reg_reg(A_MR,r,ref2.base));
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if freereg then
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cg.free_scratch_reg(list,ref2.base);
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end;
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{ ************* concatcopy ************ }
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@ -1135,7 +1206,7 @@ const
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src, dst: TReference;
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lab: tasmlabel;
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count, count2: aword;
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orgsrc, orgdst : boolean;
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orgsrc, orgdst: boolean;
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begin
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{$ifdef extdebug}
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@ -1166,11 +1237,6 @@ const
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exit;
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end;
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{ make sure source and dest are valid }
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src := source;
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fixref(list,src);
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dst := dest;
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fixref(list,dst);
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reference_reset(src);
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reference_reset(dst);
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{ load the address of source into src.base }
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@ -1180,8 +1246,9 @@ const
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a_load_ref_reg(list,OS_32,source,src.base);
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orgsrc := false;
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end
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else if assigned(source.symbol) or
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((source.offset + longint(len)) > high(smallint)) then
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else if not issimpleref(source) or
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((source.index <> R_NO) and
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((source.offset + longint(len)) > high(smallint))) then
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begin
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src.base := get_scratch_reg_address(list);
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a_loadaddr_ref_reg(list,source,src.base);
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@ -1195,8 +1262,9 @@ const
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if not orgsrc and delsource then
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reference_release(exprasmlist,source);
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{ load the address of dest into dst.base }
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if assigned(dest.symbol) or
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((dest.offset + longint(len)) > high(smallint)) then
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if not issimpleref(dest) or
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((dest.index <> R_NO) and
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((dest.offset + longint(len)) > high(smallint))) then
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begin
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dst.base := get_scratch_reg_address(list);
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a_loadaddr_ref_reg(list,dest,dst.base);
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@ -1340,35 +1408,54 @@ const
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end;
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procedure tcgppc.fixref(list: taasmoutput; var ref: treference);
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function tcgppc.issimpleref(const ref: treference): boolean;
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begin
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if (ref.base = R_NO) and
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(ref.index <> R_NO) then
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internalerror(200208101);
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result :=
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not(assigned(ref.symbol)) and
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(((ref.index = R_NO) and
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(ref.offset >= low(smallint)) and
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(ref.offset <= high(smallint))) or
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((ref.index <> R_NO) and
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(ref.offset = 0)));
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end;
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function tcgppc.fixref(list: taasmoutput; var ref: treference): boolean;
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var
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tmpreg: tregister;
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begin
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If (ref.base <> R_NO) then
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result := false;
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if (ref.base <> R_NO) then
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begin
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if (ref.index <> R_NO) and
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((ref.offset <> 0) or assigned(ref.symbol)) then
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begin
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result := true;
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tmpreg := cg.get_scratch_reg_int(list);
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if not assigned(ref.symbol) and
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(cardinal(ref.offset-low(smallint)) <=
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high(smallint)-low(smallint)) then
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begin
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list.concat(taicpu.op_reg_reg_const(
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A_ADDI,ref.base,ref.base,ref.offset));
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A_ADDI,tmpreg,ref.base,ref.offset));
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ref.offset := 0;
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end
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else
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begin
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list.concat(taicpu.op_reg_reg_reg(
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A_ADD,ref.base,ref.base,ref.index));
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A_ADD,tmpreg,ref.base,ref.index));
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ref.index := R_NO;
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end;
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ref.base := tmpreg;
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end
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end
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else
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begin
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ref.base := ref.index;
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ref.index := R_NO
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end
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if ref.index <> R_NO then
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internalerror(200208102);
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end;
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@ -1586,7 +1673,10 @@ begin
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end.
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{
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$Log$
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Revision 1.36 2002-08-06 20:55:23 florian
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Revision 1.37 2002-08-10 17:15:31 jonas
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* various fixes and optimizations
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Revision 1.36 2002/08/06 20:55:23 florian
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* first part of ppc calling conventions fix
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Revision 1.35 2002/08/06 07:12:05 jonas
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@ -198,24 +198,24 @@ interface
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if (right.location.loc = LOC_CONSTANT) then
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begin
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{$ifdef extdebug}
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if (qword(right.location.value) > high(cardinal)) then
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if (qword(right.location.valuehigh) <> 0) then
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internalerror(2002080301);
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{$endif extdebug}
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if (nodetype in [equaln,unequaln]) then
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if (unsigned and
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(right.location.value > high(word))) or
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(not unsigned and
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(right.location.value < low(smallint)) or
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(right.location.value > high(smallint))) then
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(longint(right.location.value) < low(smallint)) or
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(longint(right.location.value) > high(smallint))) then
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// we can then maybe use a constant in the 'othersigned' case
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// (the sign doesn't matter for // equal/unequal)
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unsigned := not unsigned;
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if (unsigned and
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(qword(right.location.value) <= high(word))) or
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(right.location.value) <= high(word)) or
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(not(unsigned) and
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(right.location.value >= low(smallint)) and
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(right.location.value <= high(smallint))) then
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(longint(right.location.value) >= low(smallint)) and
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(longint(right.location.value) <= high(smallint))) then
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useconst := true
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else
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begin
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@ -243,7 +243,7 @@ interface
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if (right.location.loc = LOC_CONSTANT) then
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if useconst then
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exprasmlist.concat(taicpu.op_reg_const(op,
|
||||
left.location.register,right.location.value))
|
||||
left.location.register,longint(right.location.value)))
|
||||
else
|
||||
begin
|
||||
exprasmlist.concat(taicpu.op_reg_reg(op,
|
||||
@ -348,7 +348,7 @@ interface
|
||||
left.location.register,right.location.register))
|
||||
else
|
||||
exprasmlist.concat(taicpu.op_reg_const(A_CMPLWI,
|
||||
left.location.register,right.location.value));
|
||||
left.location.register,longint(right.location.value)));
|
||||
location.resflags := getresflags;
|
||||
end;
|
||||
else
|
||||
@ -693,11 +693,11 @@ interface
|
||||
location_copy(oldleft,left.location);
|
||||
location_copy(oldright,right.location);
|
||||
if left.location.loc = LOC_CONSTANT then
|
||||
left.location.value := left.location.value shr 32
|
||||
left.location.valueqword := left.location.valueqword shr 32
|
||||
else
|
||||
left.location.registerlow := left.location.registerhigh;
|
||||
if right.location.loc = LOC_CONSTANT then
|
||||
right.location.value := right.location.value shr 32
|
||||
right.location.valueqword := right.location.valueqword shr 32
|
||||
else
|
||||
right.location.registerlow := right.location.registerhigh;
|
||||
|
||||
@ -848,8 +848,8 @@ interface
|
||||
swapleftright;
|
||||
if left.location.loc = LOC_CONSTANT then
|
||||
if not(cs_check_overflow in aktlocalswitches) and
|
||||
(left.location.value >= low(smallint)) and
|
||||
(left.location.value <= high(smallint)) then
|
||||
(longint(left.location.value) >= low(smallint)) and
|
||||
(longint(left.location.value) <= high(smallint)) then
|
||||
begin
|
||||
// optimize
|
||||
exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,
|
||||
@ -887,7 +887,7 @@ interface
|
||||
if left.location.loc = LOC_CONSTANT then
|
||||
swapleftright;
|
||||
if (right.location.loc = LOC_CONSTANT) then
|
||||
cg64.a_op64_const_reg_reg(exprasmlist,op,qword(right.location.value),
|
||||
cg64.a_op64_const_reg_reg(exprasmlist,op,right.location.valueqword,
|
||||
left.location.register64,location.register64)
|
||||
else
|
||||
cg64.a_op64_reg_reg_reg(exprasmlist,op,right.location.register64,
|
||||
@ -1281,11 +1281,11 @@ interface
|
||||
begin
|
||||
case nodetype of
|
||||
addn:
|
||||
op := A_ADDO;
|
||||
op := A_ADDO_;
|
||||
subn:
|
||||
op := A_SUBO;
|
||||
op := A_SUBO_;
|
||||
muln:
|
||||
op := A_MULLWO;
|
||||
op := A_MULLWO_;
|
||||
else
|
||||
internalerror(2002072601);
|
||||
end;
|
||||
@ -1302,7 +1302,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.6 2002-08-06 20:55:24 florian
|
||||
Revision 1.7 2002-08-10 17:15:31 jonas
|
||||
* various fixes and optimizations
|
||||
|
||||
Revision 1.6 2002/08/06 20:55:24 florian
|
||||
* first part of ppc calling conventions fix
|
||||
|
||||
Revision 1.5 2002/08/05 08:58:54 jonas
|
||||
|
||||
@ -121,7 +121,8 @@ implementation
|
||||
size := resulttype.def.size;
|
||||
leftsize := left.resulttype.def.size;
|
||||
if (size < leftsize) or
|
||||
((left.location.loc <> LOC_REGISTER) and
|
||||
(((newsize in [OS_64,OS_S64]) or
|
||||
(left.location.loc <> LOC_REGISTER)) and
|
||||
(size > leftsize)) then
|
||||
begin
|
||||
{ reuse the left location by default }
|
||||
@ -254,8 +255,8 @@ implementation
|
||||
cg.free_scratch_reg(exprasmlist,valuereg);
|
||||
|
||||
tmpfpureg := rg.getregisterfpu(exprasmlist);
|
||||
exprasmlist.concat(taicpu.op_reg_ref(A_LFD,tmpfpureg,
|
||||
tempconst.location.reference));
|
||||
a_loadfpu_ref_reg(exprasmlist,OS_F64,tempconst.location.reference,
|
||||
tmpfpureg);
|
||||
tempconst.free;
|
||||
|
||||
location.register := rg.getregisterfpu(exprasmlist);
|
||||
@ -417,7 +418,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.19 2002-07-29 21:23:44 florian
|
||||
Revision 1.20 2002-08-10 17:15:31 jonas
|
||||
* various fixes and optimizations
|
||||
|
||||
Revision 1.19 2002/07/29 21:23:44 florian
|
||||
* more fixes for the ppc
|
||||
+ wrappers for the tcnvnode.first_* stuff introduced
|
||||
|
||||
|
||||
@ -371,7 +371,6 @@ implementation
|
||||
end;
|
||||
LOC_REFERENCE,LOC_CREFERENCE:
|
||||
begin
|
||||
reference_release(exprasmlist,left.location.reference);
|
||||
if (left.resulttype.def.deftype=floatdef) then
|
||||
begin
|
||||
src1 := rg.getregisterfpu(exprasmlist);
|
||||
@ -387,16 +386,23 @@ implementation
|
||||
cg.a_load_ref_reg(exprasmlist,OS_32,
|
||||
left.location.reference,src1);
|
||||
end;
|
||||
reference_release(exprasmlist,left.location.reference);
|
||||
end;
|
||||
end;
|
||||
{ choose appropriate operand }
|
||||
if left.resulttype.def.deftype <> floatdef then
|
||||
if not(cs_check_overflow in aktlocalswitches) then
|
||||
op := A_NEG
|
||||
else
|
||||
op := A_NEGO_
|
||||
begin
|
||||
if not(cs_check_overflow in aktlocalswitches) then
|
||||
op := A_NEG
|
||||
else
|
||||
op := A_NEGO_;
|
||||
location.loc := LOC_REGISTER;
|
||||
end
|
||||
else
|
||||
op := A_FNEG;
|
||||
begin
|
||||
op := A_FNEG;
|
||||
location.loc := LOC_FPUREGISTER;
|
||||
end;
|
||||
{ emit operation }
|
||||
exprasmlist.concat(taicpu.op_reg_reg(op,location.register,src1));
|
||||
end;
|
||||
@ -489,7 +495,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.15 2002-07-26 10:48:34 jonas
|
||||
Revision 1.16 2002-08-10 17:15:31 jonas
|
||||
* various fixes and optimizations
|
||||
|
||||
Revision 1.15 2002/07/26 10:48:34 jonas
|
||||
* fixed bug in shl/shr code
|
||||
|
||||
Revision 1.14 2002/07/20 11:58:05 florian
|
||||
|
||||
@ -397,18 +397,20 @@ implementation
|
||||
end;
|
||||
end;
|
||||
|
||||
if location.reference.index=R_NO then
|
||||
if location.reference.base=R_NO then
|
||||
begin
|
||||
location.reference.index:=right.location.register;
|
||||
location.reference.base:=right.location.register;
|
||||
cg.a_op_const_reg(exprasmlist,OP_IMUL,get_mul_size,
|
||||
right.location.register);
|
||||
end
|
||||
else
|
||||
begin
|
||||
if location.reference.base=R_NO then
|
||||
{ this wouldn't make sense for the ppc since there are }
|
||||
{ no scalefactors (JM) }
|
||||
internalerror(2002072901)
|
||||
if location.reference.index=R_NO then
|
||||
begin
|
||||
location.reference.index:=right.location.register;
|
||||
cg.a_op_const_reg(exprasmlist,OP_IMUL,get_mul_size,
|
||||
right.location.register);
|
||||
end
|
||||
else
|
||||
begin
|
||||
cg.a_loadaddr_ref_reg(exprasmlist,location.reference,
|
||||
@ -436,7 +438,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.1 2002-07-29 09:21:30 jonas
|
||||
Revision 1.2 2002-08-10 17:15:31 jonas
|
||||
* various fixes and optimizations
|
||||
|
||||
Revision 1.1 2002/07/29 09:21:30 jonas
|
||||
+ tppcvecnode, almost straight copy of the i386 code, can most likely
|
||||
be made generic if all treference type allow a base, index and offset
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user