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* moved "<flag setting operation>; test/or reg,reg" to "<flag setting
operation>" optimization to pass 2 because it caused problems with -dnewoptimizations
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606dbe9435
commit
eed3807af0
@ -1526,55 +1526,6 @@ Begin
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End
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Else If DoSubAddOpt(p) Then Continue
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End;
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A_TEST, A_OR:
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{removes the line marked with (x) from the sequence
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And/or/xor/add/sub/... $x, %y
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test/or %y, %y (x)
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j(n)z _Label
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as the first instruction already adjusts the ZF}
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Begin
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If OpsEqual(Paicpu(p)^.oper[0],Paicpu(p)^.oper[1]) Then
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If GetLastInstruction(p, hp1) And
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(pai(hp1)^.typ = ait_instruction) Then
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Case Paicpu(hp1)^.opcode Of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND, A_SHL, A_SHR:
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Begin
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If OpsEqual(Paicpu(hp1)^.oper[1],Paicpu(p)^.oper[0]) Then
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Begin
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hp1 := pai(p^.next);
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asml^.remove(p);
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dispose(p, done);
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p := pai(hp1);
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continue
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End;
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End;
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A_DEC, A_INC, A_NEG:
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Begin
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If OpsEqual(Paicpu(hp1)^.oper[0],Paicpu(p)^.oper[0]) Then
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Begin
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Case Paicpu(hp1)^.opcode Of
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A_DEC, A_INC:
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{replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag}
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Begin
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Case Paicpu(hp1)^.opcode Of
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A_DEC: Paicpu(hp1)^.opcode := A_SUB;
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A_INC: Paicpu(hp1)^.opcode := A_ADD;
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End;
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Paicpu(hp1)^.Loadoper(1,Paicpu(hp1)^.oper[0]);
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Paicpu(hp1)^.LoadConst(0,1);
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Paicpu(hp1)^.ops:=2;
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End
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End;
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hp1 := pai(p^.next);
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asml^.remove(p);
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dispose(p, done);
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p := pai(hp1);
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continue
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End;
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End
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End
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Else
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End;
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A_XOR:
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If (Paicpu(p)^.oper[0].typ = top_reg) And
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(Paicpu(p)^.oper[1].typ = top_reg) And
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@ -1921,6 +1872,54 @@ Begin
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InsertLLItem(AsmL,p^.previous, p, hp1);
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End;
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End;
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A_TEST, A_OR:
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{removes the line marked with (x) from the sequence
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And/or/xor/add/sub/... $x, %y
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test/or %y, %y (x)
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j(n)z _Label
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as the first instruction already adjusts the ZF}
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Begin
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If OpsEqual(Paicpu(p)^.oper[0],Paicpu(p)^.oper[1]) Then
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If GetLastInstruction(p, hp1) And
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(pai(hp1)^.typ = ait_instruction) Then
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Case Paicpu(hp1)^.opcode Of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND, A_SHL, A_SHR:
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Begin
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If OpsEqual(Paicpu(hp1)^.oper[1],Paicpu(p)^.oper[0]) Then
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Begin
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hp1 := pai(p^.next);
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asml^.remove(p);
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dispose(p, done);
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p := pai(hp1);
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continue
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End;
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End;
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A_DEC, A_INC, A_NEG:
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Begin
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If OpsEqual(Paicpu(hp1)^.oper[0],Paicpu(p)^.oper[0]) Then
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Begin
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Case Paicpu(hp1)^.opcode Of
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A_DEC, A_INC:
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{replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag}
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Begin
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Case Paicpu(hp1)^.opcode Of
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A_DEC: Paicpu(hp1)^.opcode := A_SUB;
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A_INC: Paicpu(hp1)^.opcode := A_ADD;
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End;
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Paicpu(hp1)^.Loadoper(1,Paicpu(hp1)^.oper[0]);
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Paicpu(hp1)^.LoadConst(0,1);
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Paicpu(hp1)^.ops:=2;
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End
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End;
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hp1 := pai(p^.next);
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asml^.remove(p);
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dispose(p, done);
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p := pai(hp1);
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continue
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End;
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End
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End
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End;
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End;
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End;
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End;
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@ -1932,7 +1931,12 @@ End.
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{
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$Log$
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Revision 1.94 2000-06-14 06:05:06 jonas
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Revision 1.95 2000-07-06 12:30:31 jonas
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* moved "<flag setting operation>; test/or reg,reg" to "<flag setting
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operation>" optimization to pass 2 because it caused problems
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with -dnewoptimizations
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Revision 1.94 2000/06/14 06:05:06 jonas
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+ support for inc/dec/imul in foldarithops
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Revision 1.93 2000/05/23 10:58:46 jonas
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