mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-12-04 13:47:23 +01:00
* fixed small crashing bug ("merged")
* some more optimizations are now only done once at the end of the optimizing
cycle instead of every iteration
This commit is contained in:
Jonas Maebe
parent
8a2c142e46
commit
eefd8e9f86
@ -697,47 +697,39 @@ Begin
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Begin
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If (Taicpu(p).oper[0].typ = top_const) And
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(Taicpu(p).oper[1].typ in [top_reg,top_ref]) And
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(Taicpu(p).oper[0].val = 0) Then
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If GetNextInstruction(p, hp1) And
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(hp1.typ = ait_instruction) And
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(Taicpu(hp1).is_jmp) and
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(Taicpu(hp1).opcode=A_Jcc) and
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(Taicpu(hp1).condition in [C_LE,C_BE]) and
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GetNextInstruction(hp1,hp2) and
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(hp2.typ = ait_instruction) and
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(Taicpu(hp2).opcode = A_DEC) And
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OpsEqual(Taicpu(hp2).oper[0],Taicpu(p).oper[1]) And
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GetNextInstruction(hp2, hp3) And
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(hp3.typ = ait_instruction) and
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(Taicpu(hp3).is_jmp) and
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(Taicpu(hp3).opcode = A_JMP) And
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GetNextInstruction(hp3, hp4) And
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FindLabel(tasmlabel(Taicpu(hp1).oper[0].sym),hp4)
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Then
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Begin
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Taicpu(hp2).Opcode := A_SUB;
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Taicpu(hp2).Loadoper(1,Taicpu(hp2).oper[0]);
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Taicpu(hp2).LoadConst(0,1);
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Taicpu(hp2).ops:=2;
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Taicpu(hp3).Opcode := A_Jcc;
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Case Taicpu(hp1).condition of
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C_LE: Taicpu(hp3).condition := C_GE;
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C_BE: Taicpu(hp3).condition := C_AE;
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End;
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asml.Remove(p);
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asml.Remove(hp1);
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p.free;
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hp1.free;
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p := hp2;
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continue;
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End
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Else
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{change "cmp $0, %reg" to "test %reg, %reg"}
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If (Taicpu(p).oper[1].typ = top_reg) Then
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Begin
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Taicpu(p).opcode := A_TEST;
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Taicpu(p).loadreg(0,Taicpu(p).oper[1].reg);
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(Taicpu(p).oper[0].val = 0) and
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GetNextInstruction(p, hp1) And
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(hp1.typ = ait_instruction) And
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(Taicpu(hp1).is_jmp) and
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(Taicpu(hp1).opcode=A_Jcc) and
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(Taicpu(hp1).condition in [C_LE,C_BE]) and
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GetNextInstruction(hp1,hp2) and
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(hp2.typ = ait_instruction) and
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(Taicpu(hp2).opcode = A_DEC) And
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OpsEqual(Taicpu(hp2).oper[0],Taicpu(p).oper[1]) And
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GetNextInstruction(hp2, hp3) And
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(hp3.typ = ait_instruction) and
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(Taicpu(hp3).is_jmp) and
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(Taicpu(hp3).opcode = A_JMP) And
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GetNextInstruction(hp3, hp4) And
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FindLabel(tasmlabel(Taicpu(hp1).oper[0].sym),hp4) Then
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Begin
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Taicpu(hp2).Opcode := A_SUB;
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Taicpu(hp2).Loadoper(1,Taicpu(hp2).oper[0]);
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Taicpu(hp2).LoadConst(0,1);
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Taicpu(hp2).ops:=2;
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Taicpu(hp3).Opcode := A_Jcc;
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Case Taicpu(hp1).condition of
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C_LE: Taicpu(hp3).condition := C_GE;
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C_BE: Taicpu(hp3).condition := C_AE;
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End;
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asml.Remove(p);
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asml.Remove(hp1);
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p.free;
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hp1.free;
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p := hp2;
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continue;
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End
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End;
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A_FLD:
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Begin
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@ -1049,7 +1041,7 @@ Begin
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Begin
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TmpUsedRegs := UsedRegs;
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UpdateUsedRegs(TmpUsedRegs, Tai(hp1.next));
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If (Taicpu(p).oper[0].typ = top_reg) And
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If (Taicpu(p).oper[1].typ = top_ref) And
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{ mov reg1, mem1
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mov mem2, reg1 }
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GetNextInstruction(hp1, hp2) And
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@ -1869,54 +1861,6 @@ Begin
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End;
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End
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End;
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A_TEST, A_OR:
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{removes the line marked with (x) from the sequence
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And/or/xor/add/sub/... $x, %y
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test/or %y, %y (x)
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j(n)z _Label
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as the first instruction already adjusts the ZF}
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Begin
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If OpsEqual(Taicpu(p).oper[0],Taicpu(p).oper[1]) Then
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If GetLastInstruction(p, hp1) And
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(Tai(hp1).typ = ait_instruction) Then
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Case Taicpu(hp1).opcode Of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND{, A_SHL, A_SHR}:
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Begin
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If OpsEqual(Taicpu(hp1).oper[1],Taicpu(p).oper[0]) Then
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Begin
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hp1 := Tai(p.next);
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asml.remove(p);
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p.free;
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p := Tai(hp1);
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continue
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End;
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End;
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A_DEC, A_INC, A_NEG:
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Begin
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If OpsEqual(Taicpu(hp1).oper[0],Taicpu(p).oper[0]) Then
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Begin
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Case Taicpu(hp1).opcode Of
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A_DEC, A_INC:
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{replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag}
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Begin
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Case Taicpu(hp1).opcode Of
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A_DEC: Taicpu(hp1).opcode := A_SUB;
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A_INC: Taicpu(hp1).opcode := A_ADD;
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End;
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Taicpu(hp1).Loadoper(1,Taicpu(hp1).oper[0]);
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Taicpu(hp1).LoadConst(0,1);
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Taicpu(hp1).ops:=2;
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End
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End;
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hp1 := Tai(p.next);
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asml.remove(p);
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p.free;
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p := Tai(hp1);
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continue
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End;
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End
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End
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End;
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End;
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End;
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End;
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@ -1949,6 +1893,18 @@ Begin
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asml.Remove(hp1);
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hp1.free;
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End;
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A_CMP:
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Begin
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if (Taicpu(p).oper[0].typ = top_const) and
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(Taicpu(p).oper[0].val = 0) and
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(Taicpu(p).oper[1].typ = top_reg) then
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{change "cmp $0, %reg" to "test %reg, %reg"}
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begin
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Taicpu(p).opcode := A_TEST;
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Taicpu(p).loadreg(0,Taicpu(p).oper[1].reg);
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continue;
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end;
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End;
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A_MOV:
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if (Taicpu(p).oper[0].typ = Top_Const) And
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(Taicpu(p).oper[0].val = 0) And
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@ -2007,7 +1963,55 @@ Begin
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Taicpu(p).LoadReg(1,Reg32ToReg8(Taicpu(p).oper[1].reg));
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InsertLLItem(AsmL,p.previous, p, hp1);
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End;
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End;
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End;
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A_TEST, A_OR:
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{removes the line marked with (x) from the sequence
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And/or/xor/add/sub/... $x, %y
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test/or %y, %y (x)
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j(n)z _Label
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as the first instruction already adjusts the ZF}
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Begin
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If OpsEqual(Taicpu(p).oper[0],Taicpu(p).oper[1]) Then
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If GetLastInstruction(p, hp1) And
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(Tai(hp1).typ = ait_instruction) Then
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Case Taicpu(hp1).opcode Of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND{, A_SHL, A_SHR}:
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Begin
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If OpsEqual(Taicpu(hp1).oper[1],Taicpu(p).oper[0]) Then
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Begin
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hp1 := Tai(p.next);
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asml.remove(p);
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p.free;
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p := Tai(hp1);
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continue
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End;
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End;
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A_DEC, A_INC, A_NEG:
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Begin
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If OpsEqual(Taicpu(hp1).oper[0],Taicpu(p).oper[0]) Then
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Begin
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Case Taicpu(hp1).opcode Of
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A_DEC, A_INC:
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{replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag}
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Begin
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Case Taicpu(hp1).opcode Of
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A_DEC: Taicpu(hp1).opcode := A_SUB;
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A_INC: Taicpu(hp1).opcode := A_ADD;
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End;
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Taicpu(hp1).Loadoper(1,Taicpu(hp1).oper[0]);
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Taicpu(hp1).LoadConst(0,1);
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Taicpu(hp1).ops:=2;
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End
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End;
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hp1 := Tai(p.next);
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asml.remove(p);
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p.free;
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p := Tai(hp1);
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continue
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End;
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End
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End
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End;
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End;
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End;
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End;
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@ -2021,7 +2025,12 @@ End.
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{
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$Log$
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Revision 1.15 2001-08-26 13:37:01 florian
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Revision 1.16 2001-10-12 13:53:24 jonas
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* fixed small crashing bug ("merged")
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* some more optimizations are now only done once at the end of the optimizing
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cycle instead of every iteration
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Revision 1.15 2001/08/26 13:37:01 florian
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* some cg reorganisation
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* some PPC updates
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