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* more cpu-specific ifdef'd fpu/intregister code removed
git-svn-id: trunk@15317 -
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ceb063c7fe
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@ -233,33 +233,9 @@ implementation
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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cg.a_loadmm_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara,mms_movescalar);
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{$ifdef cpu64bitalu}
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LOC_REGISTER,
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LOC_CREGISTER :
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begin
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{ force integer size }
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left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
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cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
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end;
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{$endif cpu64bitalu}
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{$ifdef powerpc}
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{ x86_64 pushes s64comp in normal register }
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LOC_REGISTER,
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LOC_CREGISTER :
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begin
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{ force integer size }
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left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
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if (left.location.size in [OS_32,OS_S32]) then
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cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara)
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else
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cg64.a_load64_ref_cgpara(current_asmdata.CurrAsmList,left.location.reference,tempcgpara);
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end;
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{$endif powerpc}
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{$if defined(sparc) or defined(arm) or defined(m68k)}
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{ sparc and arm pass floats in normal registers }
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{ Some targets pass floats in normal registers }
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LOC_REGISTER,
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LOC_CREGISTER,
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{$endif}
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_FPUREGISTER,
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