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* arm thumb does not support ror reg1,reg2,#imm

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git-svn-id: trunk@25355 -
This commit is contained in:
florian 2013-08-23 18:41:24 +00:00
parent 950194678a
commit f34bee1df7
1 changed files with 1 additions and 1 deletions
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2
compiler/arm/cgcpu.pas
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@ -4052,7 +4052,7 @@ unit cgcpu;
list.concat(taicpu.op_reg_reg_const(op_reg_reg_opcg2asmop[op],dst,dst,imm2));
end
{$endif DUMMY}
else if (op in [OP_SHL, OP_SHR, OP_SAR, OP_ROR]) then
else if (op in [OP_SHL, OP_SHR, OP_SAR]) then
begin
list.concat(taicpu.op_reg_reg_const(op_reg_opcg2asmop[op],dst,dst,a));
end