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- 32-to-64-bit zero extension optimisations upgraded.
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
b1a76314ae
commit
f36fbd17b1
@ -3618,10 +3618,67 @@ unit aoptx86;
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end;
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end;
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end;
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end;
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end;
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end;
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{$ifdef x86_64}
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{ Change:
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movl %reg1l,%reg2l
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movq %reg2q,%reg3q (%reg1 <> %reg3)
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To:
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movl %reg1l,%reg2l
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movl %reg1l,%reg3l (Upper 32 bits of %reg3q will be zero)
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If %reg1 = %reg3, convert to:
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movl %reg1l,%reg2l
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andl %reg1l,%reg1l
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}
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if (taicpu(p).opsize = S_L) and MatchInstruction(hp1,A_MOV,[S_Q]) and
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not RegModifiedBetween(p_SourceReg, p, hp1) and
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MatchOpType(taicpu(hp1), top_reg, top_reg) and
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SuperRegistersEqual(p_TargetReg, taicpu(hp1).oper[0]^.reg) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegsBetween(TmpUsedRegs, tai(p.Next), hp1);
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taicpu(hp1).opsize := S_L;
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taicpu(hp1).loadreg(0, p_SourceReg);
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setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
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AllocRegBetween(p_SourceReg, p, hp1, UsedRegs);
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if (p_SourceReg = taicpu(hp1).oper[1]^.reg) then
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begin
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{ %reg1 = %reg3 }
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DebugMsg(SPeepholeOptimization + 'Made 32-to-64-bit zero extension more efficient (MovlMovq2MovlAndl 1)', hp1);
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taicpu(hp1).opcode := A_AND;
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end
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else
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begin
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{ %reg1 <> %reg3 }
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DebugMsg(SPeepholeOptimization + 'Made 32-to-64-bit zero extension more efficient (MovlMovq2MovlMovl 1)', hp1);
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end;
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if not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) then
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begin
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 8 done', p);
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RemoveCurrentP(p);
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Result := True;
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Exit;
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end
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else
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begin
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{ Initial instruction wasn't actually changed }
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Include(OptsToCheck, aoc_ForceNewIteration);
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{ if %reg1 = %reg3, don't do the long-distance lookahead that
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appears below since %reg1 has technically changed }
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if taicpu(hp1).opcode = A_AND then
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Exit;
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end;
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end;
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{$endif x86_64}
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end
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end
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else if taicpu(p).oper[0]^.typ = top_const then
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else if taicpu(p).oper[0]^.typ = top_const then
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begin
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begin
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if (taicpu(hp1).opcode = A_OR) and
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if (taicpu(hp1).opcode = A_OR) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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MatchOperand(taicpu(p).oper[0]^, 0) and
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MatchOperand(taicpu(p).oper[0]^, 0) and
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@ -3862,7 +3919,7 @@ unit aoptx86;
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movzbl mem, %regd
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movzbl mem, %regd
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}
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}
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if (IsMOVZXAcceptable or (taicpu(hp1).opcode<>A_MOVZX)) then
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if (taicpu(p).oper[0]^.ref^.refaddr<>addr_full) and (IsMOVZXAcceptable or (taicpu(hp1).opcode<>A_MOVZX)) then
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begin
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begin
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DebugMsg(SPeepholeOptimization + 'MovMovXX2MovXX 1 done',p);
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DebugMsg(SPeepholeOptimization + 'MovMovXX2MovXX 1 done',p);
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@ -4460,65 +4517,6 @@ unit aoptx86;
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end;
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end;
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end;
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end;
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{$ifdef x86_64}
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{ Change:
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movl %reg1l,%reg2l
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movq %reg2q,%reg3q (%reg1 <> %reg3)
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To:
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movl %reg1l,%reg2l
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movl %reg1l,%reg3l (Upper 32 bits of %reg3q will be zero)
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If %reg1 = %reg3, convert to:
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movl %reg1l,%reg2l
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andl %reg1l,%reg1l
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}
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if (taicpu(p).opsize = S_L) and MatchInstruction(hp1,A_MOV,[S_Q]) and
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MatchOpType(taicpu(p), top_reg, top_reg) and
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MatchOpType(taicpu(hp1), top_reg, top_reg) and
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SuperRegistersEqual(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[0]^.reg) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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taicpu(hp1).opsize := S_L;
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taicpu(hp1).loadreg(0, taicpu(p).oper[0]^.reg);
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setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
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AllocRegBetween(taicpu(p).oper[0]^.reg, p, hp1, UsedRegs);
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if (taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) then
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begin
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{ %reg1 = %reg3 }
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DebugMsg(SPeepholeOptimization + 'Made 32-to-64-bit zero extension more efficient (MovlMovq2MovlAndl 1)', hp1);
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taicpu(hp1).opcode := A_AND;
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end
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else
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begin
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{ %reg1 <> %reg3 }
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DebugMsg(SPeepholeOptimization + 'Made 32-to-64-bit zero extension more efficient (MovlMovq2MovlMovl 1)', hp1);
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end;
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if not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs) then
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begin
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 8 done', p);
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RemoveCurrentP(p, hp1);
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Result := True;
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Exit;
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end
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else
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begin
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{ Initial instruction wasn't actually changed }
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Include(OptsToCheck, aoc_ForceNewIteration);
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{ if %reg1 = %reg3, don't do the long-distance lookahead that
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appears below since %reg1 has technically changed }
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if taicpu(hp1).opcode = A_AND then
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Exit;
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end;
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end;
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{$endif x86_64}
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{ search further than the next instruction for a mov (as long as it's not a jump) }
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{ search further than the next instruction for a mov (as long as it's not a jump) }
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if not is_calljmpuncondret(taicpu(hp1).opcode) and
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if not is_calljmpuncondret(taicpu(hp1).opcode) and
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{ check as much as possible before the expensive GetNextInstructionUsingRegCond call }
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{ check as much as possible before the expensive GetNextInstructionUsingRegCond call }
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