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* fix int to real for non-register locations

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git-svn-id: branches/laksen/riscv_new@39491 -
This commit is contained in:
florian 2018-07-22 20:48:15 +00:00
parent f48203b66f
commit f3b7e3281a
1 changed files with 3 additions and 11 deletions
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14
compiler/riscv64/nrv64cnv.pas
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@ -113,17 +113,9 @@ unit nrv64cnv;
restype:=tfloatdef(resultdef).floattype;
location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, tfloat2tcgsize[restype]);
if (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
begin
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(ops[is_64bit(left.resultdef),is_signed(left.resultdef),restype], location.register, left.location.register));
end
else
begin
{ Load memory in fpu register }
hlcg.location_force_mem(current_asmdata.CurrAsmList, left.location, left.resultdef);
cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, location.size, location.size, left.location.reference, location.Register);
tg.ungetiftemp(current_asmdata.CurrAsmList, left.location.reference);
end;
if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, true);
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(ops[is_64bit(left.resultdef),is_signed(left.resultdef),restype], location.register, left.location.register));
end;
begin