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m68k: reworked cg.g_concatcopy. generates shorter and faster code in most cases now.
git-svn-id: trunk@33575 -
This commit is contained in:
Károly Balogh
parent
adbef4fc84
commit
f48747adf5
@ -1485,108 +1485,104 @@ unit cgcpu;
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procedure tcg68k.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
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const
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lentocgsize: array[1..4] of tcgsize = (OS_8,OS_16,OS_NO,OS_32);
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var
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helpsize : longint;
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i : byte;
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hregister : tregister;
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iregister : tregister;
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jregister : tregister;
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hp1 : treference;
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hp2 : treference;
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hl : tasmlabel;
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srcrefp,dstrefp : treference;
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srcref,dstref : treference;
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begin
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if (len in [1,2,4]) and (current_settings.cputype <> cpu_mc68000) then
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begin
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//list.concat(tai_comment.create(strpnew('g_concatcopy: small')));
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a_load_ref_ref(list,lentocgsize[len],lentocgsize[len],source,dest);
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exit;
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end;
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//list.concat(tai_comment.create(strpnew('g_concatcopy')));
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hregister := getintregister(list,OS_INT);
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{ from 12 bytes movs is being used }
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if ((len<=8) or (not(cs_opt_size in current_settings.optimizerswitches) and (len<=12))) then
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iregister:=getaddressregister(list);
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reference_reset_base(srcref,iregister,0,source.alignment);
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srcrefp:=srcref;
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srcrefp.direction := dir_inc;
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jregister:=getaddressregister(list);
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reference_reset_base(dstref,jregister,0,dest.alignment);
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dstrefp:=dstref;
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dstrefp.direction := dir_inc;
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{ iregister = source }
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{ jregister = destination }
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a_loadaddr_ref_reg(list,source,iregister);
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a_loadaddr_ref_reg(list,dest,jregister);
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if (current_settings.cputype <> cpu_mc68000) then
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begin
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srcref := source;
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dstref := dest;
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helpsize:=len div 4;
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{ move a dword x times }
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for i:=1 to helpsize do
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begin
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a_load_ref_reg(list,OS_INT,OS_INT,srcref,hregister);
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a_load_reg_ref(list,OS_INT,OS_INT,hregister,dstref);
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inc(srcref.offset,4);
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inc(dstref.offset,4);
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dec(len,4);
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end;
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{ move a word }
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if len>1 then
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begin
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a_load_ref_reg(list,OS_16,OS_16,srcref,hregister);
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a_load_reg_ref(list,OS_16,OS_16,hregister,dstref);
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inc(srcref.offset,2);
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inc(dstref.offset,2);
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dec(len,2);
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end;
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{ move a single byte }
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if len>0 then
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begin
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a_load_ref_reg(list,OS_8,OS_8,srcref,hregister);
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a_load_reg_ref(list,OS_8,OS_8,hregister,dstref);
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end
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if not ((len<=8) or (not(cs_opt_size in current_settings.optimizerswitches) and (len<=16))) then
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begin
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//list.concat(tai_comment.create(strpnew('g_concatcopy tight copy loop 020+')));
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helpsize := len - len mod 4;
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len := len mod 4;
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a_load_const_reg(list,OS_INT,(helpsize div 4)-1,hregister);
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current_asmdata.getjumplabel(hl);
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a_label(list,hl);
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list.concat(taicpu.op_ref_ref(A_MOVE,S_L,srcrefp,dstrefp));
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if (current_settings.cputype in cpu_coldfire) or ((helpsize div 4)-1 > high(smallint)) then
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begin
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{ Coldfire does not support DBRA, also it is word only }
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list.concat(taicpu.op_const_reg(A_SUBQ,S_L,1,hregister));
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list.concat(taicpu.op_sym(A_BPL,S_NO,hl));
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end
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else
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list.concat(taicpu.op_reg_sym(A_DBRA,S_NO,hregister,hl));
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end;
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helpsize:=len div 4;
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{ move a dword x times }
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for i:=1 to helpsize do
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begin
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dec(len,4);
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if (len > 0) then
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list.concat(taicpu.op_ref_ref(A_MOVE,S_L,srcrefp,dstrefp))
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else
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list.concat(taicpu.op_ref_ref(A_MOVE,S_L,srcref,dstref));
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end;
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{ move a word }
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if len>1 then
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begin
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dec(len,2);
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if (len > 0) then
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list.concat(taicpu.op_ref_ref(A_MOVE,S_W,srcrefp,dstrefp))
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else
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list.concat(taicpu.op_ref_ref(A_MOVE,S_W,srcref,dstref));
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end;
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{ move a single byte }
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if len>0 then
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list.concat(taicpu.op_ref_ref(A_MOVE,S_B,srcref,dstref));
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end
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else
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begin
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iregister:=getaddressregister(list);
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jregister:=getaddressregister(list);
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{ reference for move (An)+,(An)+ }
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reference_reset(hp1,source.alignment);
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hp1.base := iregister; { source register }
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hp1.direction := dir_inc;
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reference_reset(hp2,dest.alignment);
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hp2.base := jregister;
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hp2.direction := dir_inc;
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{ iregister = source }
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{ jregister = destination }
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a_loadaddr_ref_reg(list,source,iregister);
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a_loadaddr_ref_reg(list,dest,jregister);
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{ double word move only on 68020+ machines }
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{ because of possible alignment problems }
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{ use fast loop mode }
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if (current_settings.cputype=cpu_MC68020) then
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begin
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//list.concat(tai_comment.create(strpnew('g_concatcopy tight copy loop 020+')));
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helpsize := len - len mod 4;
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len := len mod 4;
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a_load_const_reg(list,OS_INT,(helpsize div 4)-1,hregister);
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current_asmdata.getjumplabel(hl);
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a_label(list,hl);
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list.concat(taicpu.op_ref_ref(A_MOVE,S_L,hp1,hp2));
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list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl));
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if len > 1 then
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begin
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dec(len,2);
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list.concat(taicpu.op_ref_ref(A_MOVE,S_W,hp1,hp2));
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end;
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if len = 1 then
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list.concat(taicpu.op_ref_ref(A_MOVE,S_B,hp1,hp2));
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end
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else
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begin
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{ Fast 68010 loop mode with no possible alignment problems }
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//list.concat(tai_comment.create(strpnew('g_concatcopy tight byte copy loop')));
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a_load_const_reg(list,OS_INT,len - 1,hregister);
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current_asmdata.getjumplabel(hl);
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a_label(list,hl);
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list.concat(taicpu.op_ref_ref(A_MOVE,S_B,hp1,hp2));
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if current_settings.cputype in cpu_coldfire then
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begin
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{ Coldfire does not support DBRA }
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list.concat(taicpu.op_const_reg(A_SUBQ,S_L,1,hregister));
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list.concat(taicpu.op_sym(A_BPL,S_NO,hl));
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end
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else
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list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl));
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end;
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{ Fast 68010 loop mode with no possible alignment problems }
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//list.concat(tai_comment.create(strpnew('g_concatcopy tight byte copy loop')));
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a_load_const_reg(list,OS_INT,len - 1,hregister);
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current_asmdata.getjumplabel(hl);
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a_label(list,hl);
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list.concat(taicpu.op_ref_ref(A_MOVE,S_B,srcrefp,dstrefp));
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if (len - 1) > high(smallint) then
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begin
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list.concat(taicpu.op_const_reg(A_SUBQ,S_L,1,hregister));
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list.concat(taicpu.op_sym(A_BPL,S_NO,hl));
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end
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else
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list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl));
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end;
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end;
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end;
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procedure tcg68k.g_overflowcheck(list: TAsmList; const l:tlocation; def:tdef);
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var
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