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* x86: Changed the names of temporary register
stores in OptPass1MOV for reasons of clarity,
and other minor optimisations.
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
627fb9a25b
commit
f62ffa74dc
@ -2752,7 +2752,7 @@ unit aoptx86;
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GetNextInstruction_p, TempRegUsed, CrossJump: Boolean;
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PreMessage, RegName1, RegName2, InputVal, MaskNum: string;
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NewSize: topsize;
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CurrentReg, ActiveReg: TRegister;
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p_SourceReg, p_TargetReg, NewMMReg: TRegister;
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SourceRef, TargetRef: TReference;
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MovAligned, MovUnaligned: TAsmOp;
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ThisRef: TReference;
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@ -2777,110 +2777,115 @@ unit aoptx86;
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if not GetNextInstruction_p or (hp1.typ <> ait_instruction) then
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Exit;
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{ Look for:
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mov %reg1,%reg2
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??? %reg2,r/m
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Change to:
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mov %reg1,%reg2
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??? %reg1,r/m
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}
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if MatchOpType(taicpu(p), top_reg, top_reg) then
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{ Prevent compiler warnings }
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p_TargetReg := NR_NO;
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if taicpu(p).oper[1]^.typ = top_reg then
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begin
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CurrentReg := taicpu(p).oper[1]^.reg;
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{ Saves on a large number of dereferences }
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p_TargetReg := taicpu(p).oper[1]^.reg;
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if RegReadByInstruction(CurrentReg, hp1) and
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DeepMOVOpt(taicpu(p), taicpu(hp1)) then
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{ Look for:
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mov %reg1,%reg2
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??? %reg2,r/m
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Change to:
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mov %reg1,%reg2
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??? %reg1,r/m
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}
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if taicpu(p).oper[0]^.typ = top_reg then
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begin
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{ A change has occurred, just not in p }
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Result := True;
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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if not RegUsedAfterInstruction(CurrentReg, hp1, TmpUsedRegs) and
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{ Just in case something didn't get modified (e.g. an
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implicit register) }
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not RegReadByInstruction(CurrentReg, hp1) then
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if RegReadByInstruction(p_TargetReg, hp1) and
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DeepMOVOpt(taicpu(p), taicpu(hp1)) then
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begin
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{ We can remove the original MOV }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 3 done',p);
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RemoveCurrentp(p, hp1);
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{ UsedRegs got updated by RemoveCurrentp }
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Result := True;
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Exit;
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end;
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{ If we know a MOV instruction has become a null operation, we might as well
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get rid of it now to save time. }
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if (taicpu(hp1).opcode = A_MOV) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, taicpu(p).oper[0]^.reg) and
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{ Just being a register is enough to confirm it's a null operation }
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(taicpu(hp1).oper[0]^.typ = top_reg) then
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begin
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{ A change has occurred, just not in p }
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Result := True;
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{ Speed-up to reduce a pipeline stall... if we had something like...
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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movl %eax,%edx
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movw %dx,%ax
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... the second instruction would change to movw %ax,%ax, but
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given that it is now %ax that's active rather than %eax,
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penalties might occur due to a partial register write, so instead,
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change it to a MOVZX instruction when optimising for speed.
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}
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if not (cs_opt_size in current_settings.optimizerswitches) and
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IsMOVZXAcceptable and
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(taicpu(hp1).opsize < taicpu(p).opsize)
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{$ifdef x86_64}
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{ operations already implicitly set the upper 64 bits to zero }
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and not ((taicpu(hp1).opsize = S_L) and (taicpu(p).opsize = S_Q))
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{$endif x86_64}
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then
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if not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) and
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{ Just in case something didn't get modified (e.g. an
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implicit register) }
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not RegReadByInstruction(p_TargetReg, hp1) then
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begin
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CurrentReg := taicpu(hp1).oper[1]^.reg;
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{ We can remove the original MOV }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 3 done',p);
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RemoveCurrentp(p, hp1);
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DebugMsg(SPeepholeOptimization + 'Zero-extension to minimise pipeline stall (Mov2Movz)',hp1);
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case taicpu(p).opsize of
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S_W:
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if taicpu(hp1).opsize = S_B then
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taicpu(hp1).opsize := S_BL
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else
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InternalError(2020012911);
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S_L{$ifdef x86_64}, S_Q{$endif x86_64}:
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case taicpu(hp1).opsize of
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S_B:
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taicpu(hp1).opsize := S_BL;
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S_W:
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taicpu(hp1).opsize := S_WL;
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else
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InternalError(2020012912);
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end;
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else
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InternalError(2020012910);
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end;
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taicpu(hp1).opcode := A_MOVZX;
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taicpu(hp1).oper[1]^.reg := newreg(getregtype(CurrentReg), getsupreg(CurrentReg), R_SUBD)
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end
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else
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begin
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GetNextInstruction_p := GetNextInstruction(hp1, hp2);
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 4 done',hp1);
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RemoveInstruction(hp1);
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{ The instruction after what was hp1 is now the immediate next instruction,
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so we can continue to make optimisations if it's present }
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if not GetNextInstruction_p or (hp2.typ <> ait_instruction) then
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Exit;
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hp1 := hp2;
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{ UsedRegs got updated by RemoveCurrentp }
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Result := True;
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Exit;
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end;
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end;
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{ If we know a MOV instruction has become a null operation, we might as well
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get rid of it now to save time. }
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if (taicpu(hp1).opcode = A_MOV) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, taicpu(p).oper[0]^.reg) and
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{ Just being a register is enough to confirm it's a null operation }
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(taicpu(hp1).oper[0]^.typ = top_reg) then
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begin
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Result := True;
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{ Speed-up to reduce a pipeline stall... if we had something like...
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movl %eax,%edx
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movw %dx,%ax
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... the second instruction would change to movw %ax,%ax, but
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given that it is now %ax that's active rather than %eax,
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penalties might occur due to a partial register write, so instead,
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change it to a MOVZX instruction when optimising for speed.
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}
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if not (cs_opt_size in current_settings.optimizerswitches) and
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IsMOVZXAcceptable and
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(taicpu(hp1).opsize < taicpu(p).opsize)
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{$ifdef x86_64}
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{ operations already implicitly set the upper 64 bits to zero }
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and not ((taicpu(hp1).opsize = S_L) and (taicpu(p).opsize = S_Q))
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{$endif x86_64}
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then
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begin
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DebugMsg(SPeepholeOptimization + 'Zero-extension to minimise pipeline stall (Mov2Movz)',hp1);
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case taicpu(p).opsize of
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S_W:
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if taicpu(hp1).opsize = S_B then
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taicpu(hp1).opsize := S_BL
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else
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InternalError(2020012911);
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S_L{$ifdef x86_64}, S_Q{$endif x86_64}:
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case taicpu(hp1).opsize of
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S_B:
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taicpu(hp1).opsize := S_BL;
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S_W:
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taicpu(hp1).opsize := S_WL;
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else
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InternalError(2020012912);
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end;
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else
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InternalError(2020012910);
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end;
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taicpu(hp1).opcode := A_MOVZX;
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setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
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end
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else
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begin
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GetNextInstruction_p := GetNextInstruction(hp1, hp2);
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 4 done',hp1);
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RemoveInstruction(hp1);
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{ The instruction after what was hp1 is now the immediate next instruction,
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so we can continue to make optimisations if it's present }
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if not GetNextInstruction_p or (hp2.typ <> ait_instruction) then
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Exit;
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hp1 := hp2;
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end;
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end;
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end;
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end;
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end;
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@ -3375,15 +3380,15 @@ unit aoptx86;
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if (taicpu(p).oper[1]^.typ = top_reg) and
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MatchOperand(taicpu(p).oper[1]^,taicpu(hp1).oper[0]^) then
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begin
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CurrentReg := taicpu(p).oper[1]^.reg;
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{ Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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{ we have
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mov x, %treg
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mov %treg, y
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}
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if not(RegInOp(CurrentReg, taicpu(hp1).oper[1]^)) then
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if not(RegUsedAfterInstruction(CurrentReg, hp1, TmpUsedRegs)) then
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if not(RegInOp(p_TargetReg, taicpu(hp1).oper[1]^)) then
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if not(RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs)) then
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{ we've got
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mov x, %treg
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@ -3485,8 +3490,8 @@ unit aoptx86;
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RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
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not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
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begin
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CurrentReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
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if CurrentReg <> NR_NO then
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NewMMReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
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if NewMMReg <> NR_NO then
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begin
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{ Remember that the offsets are 8 ahead }
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if ((SourceRef.offset mod 16) = 8) and
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@ -3500,7 +3505,7 @@ unit aoptx86;
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taicpu(p).opcode := MovUnaligned;
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taicpu(p).opsize := S_XMM;
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taicpu(p).oper[1]^.reg := CurrentReg;
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taicpu(p).oper[1]^.reg := NewMMReg;
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if ((TargetRef.offset mod 16) = 8) and
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(
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@ -3513,9 +3518,9 @@ unit aoptx86;
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taicpu(hp1).opcode := MovUnaligned;
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taicpu(hp1).opsize := S_XMM;
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taicpu(hp1).oper[0]^.reg := CurrentReg;
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taicpu(hp1).oper[0]^.reg := NewMMReg;
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DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(CurrentReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 1)', p);
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DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(NewMMReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 1)', p);
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RemoveInstruction(hp2);
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RemoveInstruction(hp3);
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@ -3541,8 +3546,8 @@ unit aoptx86;
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RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
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not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
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begin
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CurrentReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
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if CurrentReg <> NR_NO then
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NewMMReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
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if NewMMReg <> NR_NO then
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begin
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{ hp2 and hp3 are the starting offsets, so mod = 0 this time }
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if ((SourceRef.offset mod 16) = 0) and
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@ -3556,7 +3561,7 @@ unit aoptx86;
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taicpu(hp2).opcode := MovUnaligned;
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taicpu(hp2).opsize := S_XMM;
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taicpu(hp2).oper[1]^.reg := CurrentReg;
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taicpu(hp2).oper[1]^.reg := NewMMReg;
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if ((TargetRef.offset mod 16) = 0) and
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(
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@ -3569,9 +3574,9 @@ unit aoptx86;
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taicpu(hp3).opcode := MovUnaligned;
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taicpu(hp3).opsize := S_XMM;
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taicpu(hp3).oper[0]^.reg := CurrentReg;
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taicpu(hp3).oper[0]^.reg := NewMMReg;
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DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(CurrentReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 2)', p);
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DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(NewMMReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 2)', p);
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RemoveInstruction(hp1);
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RemoveCurrentP(p, hp2);
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@ -3799,37 +3804,37 @@ unit aoptx86;
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}
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if MatchOpType(taicpu(p), top_reg, top_reg) then
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begin
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CurrentReg := taicpu(p).oper[0]^.reg;
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ActiveReg := taicpu(p).oper[1]^.reg;
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p_SourceReg := taicpu(p).oper[0]^.reg;
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{ Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
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if (taicpu(hp1).oper[0]^.typ = top_ref) { The other operand will be a register } and
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(taicpu(hp1).oper[1]^.reg = CurrentReg) and
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RegInRef(CurrentReg, taicpu(hp1).oper[0]^.ref^) and
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(taicpu(hp1).oper[1]^.reg = p_SourceReg) and
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RegInRef(p_SourceReg, taicpu(hp1).oper[0]^.ref^) and
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GetNextInstruction(hp1, hp2) and
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MatchInstruction(hp2, A_MOV, [taicpu(p).opsize]) and
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(taicpu(hp2).oper[0]^.typ = top_ref) { The other operand will be a register } then
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begin
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SourceRef := taicpu(hp2).oper[0]^.ref^;
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if RegInRef(ActiveReg, SourceRef) and
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if RegInRef(p_TargetReg, SourceRef) and
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{ If %reg1 also appears in the second reference, then it will
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not refer to the same memory block as the first reference }
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not RegInRef(CurrentReg, SourceRef) then
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not RegInRef(p_SourceReg, SourceRef) then
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begin
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{ Check to see if the references match if %reg2 is changed to %reg1 }
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if SourceRef.base = ActiveReg then
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SourceRef.base := CurrentReg;
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if SourceRef.base = p_TargetReg then
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SourceRef.base := p_SourceReg;
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if SourceRef.index = ActiveReg then
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SourceRef.index := CurrentReg;
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if SourceRef.index = p_TargetReg then
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SourceRef.index := p_SourceReg;
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{ RefsEqual also checks to ensure both references are non-volatile }
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if RefsEqual(taicpu(hp1).oper[0]^.ref^, SourceRef) then
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begin
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taicpu(hp2).loadreg(0, CurrentReg);
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taicpu(hp2).loadreg(0, p_SourceReg);
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DebugMsg(SPeepholeOptimization + 'Optimised register duplication and memory read (MovMovMov2MovMovMov)', p);
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Result := True;
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if taicpu(hp2).oper[1]^.reg = ActiveReg then
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if taicpu(hp2).oper[1]^.reg = p_TargetReg then
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begin
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 5a done', p);
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RemoveCurrentP(p, hp1);
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@ -3842,7 +3847,7 @@ unit aoptx86;
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
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if not RegUsedAfterInstruction(ActiveReg, hp2, TmpUsedRegs) then
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if not RegUsedAfterInstruction(p_TargetReg, hp2, TmpUsedRegs) then
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begin
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 5b done', p);
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RemoveCurrentP(p, hp1);
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@ -3871,8 +3876,7 @@ unit aoptx86;
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{ Initialise CrossJump (if it becomes True at any point, it will remain True) }
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CrossJump := (taicpu(hp1).opcode = A_Jcc);
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{ Saves on a large number of dereferences }
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ActiveReg := taicpu(p).oper[1]^.reg;
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{ Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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@ -3882,16 +3886,16 @@ unit aoptx86;
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else
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JumpTracking := nil;
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while GetNextInstructionUsingRegCond(hp3,hp2,ActiveReg,JumpTracking,CrossJump) and
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while GetNextInstructionUsingRegCond(hp3,hp2,p_TargetReg,JumpTracking,CrossJump) and
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{ GetNextInstructionUsingRegCond only searches one instruction ahead unless -O3 is specified }
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(hp2.typ=ait_instruction) do
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begin
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case taicpu(hp2).opcode of
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A_POP:
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if MatchOperand(taicpu(hp2).oper[0]^,ActiveReg) then
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if MatchOperand(taicpu(hp2).oper[0]^,p_TargetReg) then
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begin
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if not CrossJump and
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not RegUsedBetween(ActiveReg, p, hp2) then
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not RegUsedBetween(p_TargetReg, p, hp2) then
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begin
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{ We can remove the original MOV since the register
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wasn't used between it and its popping from the stack }
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@ -3905,7 +3909,7 @@ unit aoptx86;
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Break;
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end;
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A_MOV:
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if MatchOperand(taicpu(hp2).oper[0]^,ActiveReg) and
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if MatchOperand(taicpu(hp2).oper[0]^,p_TargetReg) and
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((taicpu(p).oper[0]^.typ=top_const) or
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((taicpu(p).oper[0]^.typ=top_reg) and
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not(RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp2))
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@ -3924,8 +3928,8 @@ unit aoptx86;
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TempRegUsed :=
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CrossJump { Assume the register is in use if it crossed a conditional jump } or
|
||||
RegReadByInstruction(ActiveReg, hp3) or
|
||||
RegUsedAfterInstruction(ActiveReg, hp2, TmpUsedRegs);
|
||||
RegReadByInstruction(p_TargetReg, hp3) or
|
||||
RegUsedAfterInstruction(p_TargetReg, hp2, TmpUsedRegs);
|
||||
|
||||
case taicpu(p).oper[0]^.typ Of
|
||||
top_reg:
|
||||
@ -3938,17 +3942,17 @@ unit aoptx86;
|
||||
|
||||
mov %reg, y
|
||||
}
|
||||
CurrentReg := taicpu(p).oper[0]^.reg; { Saves on a handful of pointer dereferences }
|
||||
p_SourceReg := taicpu(p).oper[0]^.reg; { Saves on a handful of pointer dereferences }
|
||||
RegName1 := debug_regname(taicpu(hp2).oper[0]^.reg);
|
||||
if MatchOperand(taicpu(hp2).oper[1]^, CurrentReg) then
|
||||
if MatchOperand(taicpu(hp2).oper[1]^, p_SourceReg) then
|
||||
begin
|
||||
{ %reg = y - remove hp2 completely (doing it here instead of relying on
|
||||
the "mov %reg,%reg" optimisation might cut down on a pass iteration) }
|
||||
|
||||
if TempRegUsed then
|
||||
begin
|
||||
DebugMsg(SPeepholeOptimization + debug_regname(CurrentReg) + ' = ' + RegName1 + '; removed unnecessary instruction (MovMov2MovNop 6b}',hp2);
|
||||
AllocRegBetween(CurrentReg, p, hp2, UsedRegs);
|
||||
DebugMsg(SPeepholeOptimization + debug_regname(p_SourceReg) + ' = ' + RegName1 + '; removed unnecessary instruction (MovMov2MovNop 6b}',hp2);
|
||||
AllocRegBetween(p_SourceReg, p, hp2, UsedRegs);
|
||||
{ Set the start of the next GetNextInstructionUsingRegCond search
|
||||
to start at the entry right before hp2 (which is about to be removed) }
|
||||
hp3 := tai(hp2.Previous);
|
||||
@ -3971,19 +3975,19 @@ unit aoptx86;
|
||||
end
|
||||
else
|
||||
begin
|
||||
AllocRegBetween(CurrentReg, p, hp2, UsedRegs);
|
||||
taicpu(hp2).loadReg(0, CurrentReg);
|
||||
AllocRegBetween(p_SourceReg, p, hp2, UsedRegs);
|
||||
taicpu(hp2).loadReg(0, p_SourceReg);
|
||||
|
||||
DebugMsg(SPeepholeOptimization + RegName1 + ' = ' + debug_regname(CurrentReg) + '; changed to minimise pipeline stall (MovMov2Mov 6a}',hp2);
|
||||
DebugMsg(SPeepholeOptimization + RegName1 + ' = ' + debug_regname(p_SourceReg) + '; changed to minimise pipeline stall (MovMov2Mov 6a}',hp2);
|
||||
|
||||
{ Check to see if the register also appears in the reference }
|
||||
if (taicpu(hp2).oper[1]^.typ = top_ref) then
|
||||
ReplaceRegisterInRef(taicpu(hp2).oper[1]^.ref^, ActiveReg, CurrentReg);
|
||||
ReplaceRegisterInRef(taicpu(hp2).oper[1]^.ref^, p_TargetReg, p_SourceReg);
|
||||
|
||||
{ Don't remove the first instruction if the temporary register is in use }
|
||||
if not TempRegUsed and
|
||||
{ ReplaceRegisterInRef won't actually replace the register if it's a different size }
|
||||
not RegInOp(ActiveReg, taicpu(hp2).oper[1]^) then
|
||||
not RegInOp(p_TargetReg, taicpu(hp2).oper[1]^) then
|
||||
begin
|
||||
DebugMsg(SPeepholeOptimization + 'MovMov2Mov 6 done',p);
|
||||
RemoveCurrentP(p, hp1);
|
||||
@ -4037,11 +4041,11 @@ unit aoptx86;
|
||||
end;
|
||||
end
|
||||
else
|
||||
if MatchOperand(taicpu(hp2).oper[1]^, ActiveReg) then
|
||||
if MatchOperand(taicpu(hp2).oper[1]^, p_TargetReg) then
|
||||
begin
|
||||
if not CrossJump and
|
||||
not RegUsedBetween(ActiveReg, p, hp2) and
|
||||
not RegReadByInstruction(ActiveReg, hp2) then
|
||||
not RegUsedBetween(p_TargetReg, p, hp2) and
|
||||
not RegReadByInstruction(p_TargetReg, hp2) then
|
||||
begin
|
||||
{ Register is not used before it is overwritten }
|
||||
DebugMsg(SPeepholeOptimization + 'Mov2Nop 3a done',p);
|
||||
@ -4067,8 +4071,8 @@ unit aoptx86;
|
||||
end;
|
||||
A_MOVZX, A_MOVSX{$ifdef x86_64}, A_MOVSXD{$endif x86_64}:
|
||||
if MatchOpType(taicpu(hp2), top_reg, top_reg) and
|
||||
MatchOperand(taicpu(hp2).oper[0]^, ActiveReg) and
|
||||
SuperRegistersEqual(taicpu(hp2).oper[1]^.reg, ActiveReg) then
|
||||
MatchOperand(taicpu(hp2).oper[0]^, p_TargetReg) and
|
||||
SuperRegistersEqual(taicpu(hp2).oper[1]^.reg, p_TargetReg) then
|
||||
begin
|
||||
{
|
||||
Change from:
|
||||
@ -4108,10 +4112,10 @@ unit aoptx86;
|
||||
{ Also catches MOV/S/Z instructions that aren't modified }
|
||||
if taicpu(p).oper[0]^.typ = top_reg then
|
||||
begin
|
||||
CurrentReg := taicpu(p).oper[0]^.reg;
|
||||
p_SourceReg := taicpu(p).oper[0]^.reg;
|
||||
if
|
||||
not RegModifiedByInstruction(CurrentReg, hp3) and
|
||||
not RegModifiedBetween(CurrentReg, hp3, hp2) and
|
||||
not RegModifiedByInstruction(p_SourceReg, hp3) and
|
||||
not RegModifiedBetween(p_SourceReg, hp3, hp2) and
|
||||
DeepMOVOpt(taicpu(p), taicpu(hp2)) then
|
||||
begin
|
||||
Result := True;
|
||||
@ -4120,7 +4124,7 @@ unit aoptx86;
|
||||
implicit register). Also, if it does read from this
|
||||
register, then there's no longer an advantage to
|
||||
changing the register on subsequent instructions.}
|
||||
if not RegReadByInstruction(ActiveReg, hp2) then
|
||||
if not RegReadByInstruction(p_TargetReg, hp2) then
|
||||
begin
|
||||
{ If a conditional jump was crossed, do not delete
|
||||
the original MOV no matter what }
|
||||
@ -4128,7 +4132,7 @@ unit aoptx86;
|
||||
{ RegEndOfLife returns True if the register is
|
||||
deallocated before the next instruction or has
|
||||
been loaded with a new value }
|
||||
RegEndOfLife(ActiveReg, taicpu(hp2)) then
|
||||
RegEndOfLife(p_TargetReg, taicpu(hp2)) then
|
||||
begin
|
||||
{ We can remove the original MOV }
|
||||
DebugMsg(SPeepholeOptimization + 'Mov2Nop 3b done',p);
|
||||
@ -4138,7 +4142,7 @@ unit aoptx86;
|
||||
Exit;
|
||||
end;
|
||||
|
||||
if not RegModifiedByInstruction(ActiveReg, hp2) then
|
||||
if not RegModifiedByInstruction(p_TargetReg, hp2) then
|
||||
begin
|
||||
{ See if there's more we can optimise }
|
||||
hp3 := hp2;
|
||||
@ -4566,10 +4570,10 @@ unit aoptx86;
|
||||
}
|
||||
if MatchOpType(taicpu(p), top_reg, top_reg) then
|
||||
begin
|
||||
CurrentReg := taicpu(p).oper[0]^.reg;
|
||||
ActiveReg := taicpu(p).oper[1]^.reg;
|
||||
p_SourceReg := taicpu(p).oper[0]^.reg;
|
||||
{ Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
|
||||
TransferUsedRegs(TmpUsedRegs);
|
||||
if not RegUsedAfterInstruction(CurrentReg, p, TmpUsedRegs) and
|
||||
if not RegUsedAfterInstruction(p_SourceReg, p, TmpUsedRegs) and
|
||||
GetLastInstruction(p, hp2) and
|
||||
(hp2.typ = ait_instruction) and
|
||||
{ Have to make sure it's an instruction that only reads from
|
||||
@ -4578,25 +4582,21 @@ unit aoptx86;
|
||||
(taicpu(hp2).ops = 2) and
|
||||
(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Wop2] = [Ch_Rop1, Ch_Wop2]) and
|
||||
(taicpu(hp2).oper[1]^.typ = top_reg) and
|
||||
(taicpu(hp2).oper[1]^.reg = CurrentReg) then
|
||||
(taicpu(hp2).oper[1]^.reg = p_SourceReg) then
|
||||
begin
|
||||
case taicpu(hp2).opcode of
|
||||
A_FSTSW, A_FNSTSW,
|
||||
A_IN, A_INS, A_OUT, A_OUTS,
|
||||
A_CMPS, A_LODS, A_MOVS, A_SCAS, A_STOS,
|
||||
A_CMPS, A_LODS, A_MOVS, A_SCAS, A_STOS:
|
||||
{ These routines have explicit operands, but they are restricted in
|
||||
what they can be (e.g. IN and OUT can only read from AL, AX or
|
||||
EAX. }
|
||||
A_CMOVcc:
|
||||
{ CMOV is not valid either because then CurrentReg will depend
|
||||
on an unknown value if the condition is False and hence is
|
||||
not a pure write }
|
||||
;
|
||||
else
|
||||
begin
|
||||
DebugMsg(SPeepholeOptimization + 'Removed MOV and changed destination on previous instruction to optimise register usage (FuncMov2Func)', p);
|
||||
taicpu(hp2).oper[1]^.reg := ActiveReg;
|
||||
AllocRegBetween(ActiveReg, hp2, p, TmpUsedRegs);
|
||||
taicpu(hp2).oper[1]^.reg := p_TargetReg;
|
||||
AllocRegBetween(p_TargetReg, hp2, p, TmpUsedRegs);
|
||||
RemoveCurrentp(p, hp1);
|
||||
Result := True;
|
||||
Exit;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user