mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-09-11 19:49:31 +02:00
+ added the NEC V20/V30 instructions
git-svn-id: trunk@25750 -
This commit is contained in:
parent
376259cc8e
commit
f6e846c574
@ -949,5 +949,19 @@
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'rorx',
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'sarx',
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'shlx',
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'shrx'
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'shrx',
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'add4s',
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'brkem',
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'clr1',
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'cmp4s',
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'ext',
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'ins',
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'not1',
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'repc',
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'repnc',
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'rol4',
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'ror4',
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'set1',
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'sub4s',
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'test1'
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);
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|
@ -949,5 +949,19 @@ attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE
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);
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|
@ -949,5 +949,19 @@
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'rorx',
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'sarx',
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'shlx',
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'shrx'
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'shrx',
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'add4s',
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'brkem',
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'clr1',
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'cmp4s',
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'ext',
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'ins',
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'not1',
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'repc',
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'repnc',
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'rol4',
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'ror4',
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'set1',
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'sub4s',
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'test1'
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);
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|
@ -949,5 +949,19 @@ A_BEXTR,
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A_RORX,
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A_SARX,
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A_SHLX,
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A_SHRX
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A_SHRX,
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A_ADD4S,
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A_BRKEM,
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A_CLR1,
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A_CMP4S,
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A_EXT,
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A_INS,
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A_NOT1,
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A_REPC,
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A_REPNC,
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A_ROL4,
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A_ROR4,
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A_SET1,
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A_SUB4S,
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A_TEST1
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);
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@ -949,5 +949,19 @@
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3))
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
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(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
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(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
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(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
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(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
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(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2))
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);
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@ -949,5 +949,19 @@
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'rorx',
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'sarx',
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'shlx',
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'shrx'
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'shrx',
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'add4s',
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'brkem',
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'clr1',
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'cmp4s',
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'ext',
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'ins',
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'not1',
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'repc',
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'repnc',
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'rol4',
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'ror4',
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'set1',
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'sub4s',
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'test1'
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);
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|
@ -949,5 +949,19 @@ attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE,
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attsufNONE
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);
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|
@ -949,5 +949,19 @@
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'rorx',
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'sarx',
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'shlx',
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'shrx'
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'shrx',
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'add4s',
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'brkem',
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'clr1',
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'cmp4s',
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'ext',
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'ins',
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'not1',
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'repc',
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'repnc',
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'rol4',
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'ror4',
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'set1',
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'sub4s',
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'test1'
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);
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@ -1,2 +1,2 @@
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{ don't edit, this file is generated from x86ins.dat }
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1658;
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1686;
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@ -949,5 +949,19 @@ A_BEXTR,
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A_RORX,
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A_SARX,
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A_SHLX,
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A_SHRX
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A_SHRX,
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A_ADD4S,
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A_BRKEM,
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A_CLR1,
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A_CMP4S,
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A_EXT,
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A_INS,
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A_NOT1,
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A_REPC,
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A_REPNC,
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A_ROL4,
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A_ROR4,
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A_SET1,
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A_SUB4S,
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A_TEST1
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);
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@ -949,5 +949,19 @@
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3))
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(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
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(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
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(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
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(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
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(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
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(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
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(Ch: (Ch_All, Ch_None, Ch_None)),
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(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2))
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);
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@ -11605,5 +11605,201 @@
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optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_reg32,ot_none);
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code : #220#242#249#1#247#62#72;
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flags : if_bmi2
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),
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(
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opcode : A_ADD4S;
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ops : 0;
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optypes : (ot_none,ot_none,ot_none,ot_none);
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code : #2#15#32;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_BRKEM;
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ops : 1;
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optypes : (ot_immediate,ot_none,ot_none,ot_none);
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code : #2#15#255#20;
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flags : if_nec or if_sb or if_16bitonly
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),
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(
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opcode : A_CLR1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
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code : #2#15#18#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_CLR1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
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code : #2#15#19#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_CLR1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
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code : #2#15#26#128#21;
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flags : if_nec or if_sb or if_16bitonly
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),
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(
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opcode : A_CLR1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
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code : #2#15#27#128#21;
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flags : if_nec or if_sw or if_16bitonly
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),
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(
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opcode : A_CMP4S;
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ops : 0;
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optypes : (ot_none,ot_none,ot_none,ot_none);
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code : #2#15#38;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_EXT;
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ops : 2;
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optypes : (ot_reg8,ot_reg8,ot_none,ot_none);
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code : #2#15#51#65;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_EXT;
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ops : 2;
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optypes : (ot_reg8,ot_immediate,ot_none,ot_none);
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code : #2#15#59#128#21;
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flags : if_nec or if_sb or if_16bitonly
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),
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(
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opcode : A_INS;
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ops : 2;
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optypes : (ot_reg8,ot_reg8,ot_none,ot_none);
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code : #2#15#49#65;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_INS;
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ops : 2;
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optypes : (ot_reg8,ot_immediate,ot_none,ot_none);
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code : #2#15#57#128#21;
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flags : if_nec or if_sb or if_16bitonly
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),
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(
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opcode : A_NOT1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
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code : #2#15#22#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_NOT1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
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code : #2#15#23#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_NOT1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
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code : #2#15#30#128#21;
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flags : if_nec or if_sb or if_16bitonly
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),
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(
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opcode : A_NOT1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
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code : #2#15#31#128#21;
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flags : if_nec or if_sw or if_16bitonly
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),
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(
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opcode : A_REPC;
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ops : 0;
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optypes : (ot_none,ot_none,ot_none,ot_none);
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code : #1#101;
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flags : if_nec or if_pre or if_16bitonly
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),
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(
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opcode : A_REPNC;
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ops : 0;
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optypes : (ot_none,ot_none,ot_none,ot_none);
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code : #1#100;
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flags : if_nec or if_pre or if_16bitonly
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),
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(
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opcode : A_ROL4;
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ops : 1;
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optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
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code : #2#15#40#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_ROR4;
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ops : 1;
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optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
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code : #2#15#42#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_SET1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
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code : #2#15#20#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_SET1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
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code : #2#15#21#128;
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flags : if_nec or if_16bitonly
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),
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(
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opcode : A_SET1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
|
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code : #2#15#28#128#21;
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flags : if_nec or if_sb or if_16bitonly
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),
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(
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opcode : A_SET1;
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ops : 2;
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optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
|
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code : #2#15#29#128#21;
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flags : if_nec or if_sw or if_16bitonly
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),
|
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(
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opcode : A_SUB4S;
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ops : 0;
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optypes : (ot_none,ot_none,ot_none,ot_none);
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code : #2#15#34;
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flags : if_nec or if_16bitonly
|
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),
|
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(
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opcode : A_TEST1;
|
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ops : 2;
|
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optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
|
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code : #2#15#16#128;
|
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flags : if_nec or if_16bitonly
|
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),
|
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(
|
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opcode : A_TEST1;
|
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ops : 2;
|
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optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
|
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code : #2#15#17#128;
|
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flags : if_nec or if_16bitonly
|
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),
|
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(
|
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opcode : A_TEST1;
|
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ops : 2;
|
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optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
|
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code : #2#15#24#128#21;
|
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flags : if_nec or if_sb or if_16bitonly
|
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),
|
||||
(
|
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opcode : A_TEST1;
|
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ops : 2;
|
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optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
|
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code : #2#15#25#128#21;
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flags : if_nec or if_sw or if_16bitonly
|
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)
|
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);
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|
@ -413,11 +413,19 @@ begin
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hs:=readstr;
|
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if x86_64 then
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begin
|
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if (upcase(hs)='NOX86_64') then
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{ x86_64 }
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if (upcase(hs)='NOX86_64') or (upcase(hs)='16BITONLY') then
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skip:=true;
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end
|
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else if not i8086 then
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begin
|
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{ i386 }
|
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if (upcase(hs)='X86_64') or (upcase(hs)='16BITONLY') then
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skip:=true;
|
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end
|
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else
|
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begin
|
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{ i8086 }
|
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if (upcase(hs)='X86_64') then
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skip:=true;
|
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end;
|
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|
@ -429,6 +429,7 @@ implementation
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IF_AVX = $00200000;
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IF_BMI1 = $00200000;
|
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IF_BMI2 = $00200000;
|
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IF_16BITONLY = $00200000;
|
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|
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IF_PLEVEL = $0F000000; { mask for processor level }
|
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IF_8086 = $00000000; { 8086 instruction }
|
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@ -446,6 +447,7 @@ implementation
|
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IF_AMD = $0c000000; { AMD-specific instruction }
|
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IF_CENTAUR = $0d000000; { centaur-specific instruction }
|
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IF_SANDYBRIDGE = $0e000000; { Sandybridge-specific instruction }
|
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IF_NEC = $0f000000; { NEC V20/V30 instruction }
|
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{ added flags }
|
||||
IF_PRE = $40000000; { it's a prefix instruction }
|
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IF_PASS2 = $80000000; { if the instruction can change in a second pass }
|
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|
@ -4712,3 +4712,78 @@ reg64,rm64,reg64 \361\362\363\371\1\xf7\76\110 BMI2,X
|
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reg32,rm32,reg32 \334\362\371\1\xf7\76\110 BMI2
|
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reg64,rm64,reg64 \334\362\363\371\1\xf7\76\110 BMI2,X86_64
|
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|
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;*******************************************************************************
|
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;********** NEC V20/V30 ********************************************************
|
||||
;*******************************************************************************
|
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|
||||
[ADD4S]
|
||||
(Ch_All, Ch_None, Ch_None)
|
||||
void \2\x0F\x20 NEC,16BITONLY
|
||||
|
||||
[BRKEM]
|
||||
(Ch_All, Ch_None, Ch_None)
|
||||
imm \2\x0F\xFF\24 NEC,SB,16BITONLY
|
||||
|
||||
[CLR1]
|
||||
(Ch_Mop2, Ch_Rop1, Ch_None)
|
||||
rm8,reg_cl \2\x0F\x12\200 NEC,16BITONLY
|
||||
rm16,reg_cl \2\x0F\x13\200 NEC,16BITONLY
|
||||
rm8,imm \2\x0F\x1A\200\25 NEC,SB,16BITONLY
|
||||
rm16,imm \2\x0F\x1B\200\25 NEC,SW,16BITONLY
|
||||
|
||||
[CMP4S]
|
||||
(Ch_All, Ch_None, Ch_None)
|
||||
void \2\x0F\x26 NEC,16BITONLY
|
||||
|
||||
[EXT]
|
||||
(Ch_All, Ch_None, Ch_None)
|
||||
reg8,reg8 \2\x0F\x33\101 NEC,16BITONLY
|
||||
reg8,imm \2\x0F\x3B\200\25 NEC,SB,16BITONLY
|
||||
|
||||
;[FPO2]
|
||||
|
||||
[INS]
|
||||
(Ch_All, Ch_None, Ch_None)
|
||||
reg8,reg8 \2\x0F\x31\101 NEC,16BITONLY
|
||||
reg8,imm \2\x0F\x39\200\25 NEC,SB,16BITONLY
|
||||
|
||||
[NOT1]
|
||||
(Ch_Mop2, Ch_Rop1, Ch_None)
|
||||
rm8,reg_cl \2\x0F\x16\200 NEC,16BITONLY
|
||||
rm16,reg_cl \2\x0F\x17\200 NEC,16BITONLY
|
||||
rm8,imm \2\x0F\x1E\200\25 NEC,SB,16BITONLY
|
||||
rm16,imm \2\x0F\x1F\200\25 NEC,SW,16BITONLY
|
||||
|
||||
[REPC]
|
||||
(Ch_RWECX, Ch_RWFlags, Ch_None)
|
||||
void \1\x65 NEC,PRE,16BITONLY
|
||||
|
||||
[REPNC]
|
||||
(Ch_RWECX, Ch_RWFlags, Ch_None)
|
||||
void \1\x64 NEC,PRE,16BITONLY
|
||||
|
||||
[ROL4]
|
||||
(Ch_Mop1, Ch_RWEAX, Ch_None)
|
||||
rm8 \2\x0F\x28\200 NEC,16BITONLY
|
||||
|
||||
[ROR4]
|
||||
(Ch_Mop1, Ch_RWEAX, Ch_None)
|
||||
rm8 \2\x0F\x2A\200 NEC,16BITONLY
|
||||
|
||||
[SET1]
|
||||
(Ch_Mop2, Ch_Rop1, Ch_None)
|
||||
rm8,reg_cl \2\x0F\x14\200 NEC,16BITONLY
|
||||
rm16,reg_cl \2\x0F\x15\200 NEC,16BITONLY
|
||||
rm8,imm \2\x0F\x1C\200\25 NEC,SB,16BITONLY
|
||||
rm16,imm \2\x0F\x1D\200\25 NEC,SW,16BITONLY
|
||||
|
||||
[SUB4S]
|
||||
(Ch_All, Ch_None, Ch_None)
|
||||
void \2\x0F\x22 NEC,16BITONLY
|
||||
|
||||
[TEST1]
|
||||
(Ch_WFlags, Ch_Rop1, Ch_Rop2)
|
||||
rm8,reg_cl \2\x0F\x10\200 NEC,16BITONLY
|
||||
rm16,reg_cl \2\x0F\x11\200 NEC,16BITONLY
|
||||
rm8,imm \2\x0F\x18\200\25 NEC,SB,16BITONLY
|
||||
rm16,imm \2\x0F\x19\200\25 NEC,SW,16BITONLY
|
||||
|
@ -949,5 +949,19 @@ attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE,
|
||||
attsufNONE
|
||||
);
|
||||
|
@ -949,5 +949,19 @@
|
||||
'rorx',
|
||||
'sarx',
|
||||
'shlx',
|
||||
'shrx'
|
||||
'shrx',
|
||||
'add4s',
|
||||
'brkem',
|
||||
'clr1',
|
||||
'cmp4s',
|
||||
'ext',
|
||||
'ins',
|
||||
'not1',
|
||||
'repc',
|
||||
'repnc',
|
||||
'rol4',
|
||||
'ror4',
|
||||
'set1',
|
||||
'sub4s',
|
||||
'test1'
|
||||
);
|
||||
|
@ -949,5 +949,19 @@
|
||||
'rorx',
|
||||
'sarx',
|
||||
'shlx',
|
||||
'shrx'
|
||||
'shrx',
|
||||
'add4s',
|
||||
'brkem',
|
||||
'clr1',
|
||||
'cmp4s',
|
||||
'ext',
|
||||
'ins',
|
||||
'not1',
|
||||
'repc',
|
||||
'repnc',
|
||||
'rol4',
|
||||
'ror4',
|
||||
'set1',
|
||||
'sub4s',
|
||||
'test1'
|
||||
);
|
||||
|
@ -949,5 +949,19 @@ A_BEXTR,
|
||||
A_RORX,
|
||||
A_SARX,
|
||||
A_SHLX,
|
||||
A_SHRX
|
||||
A_SHRX,
|
||||
A_ADD4S,
|
||||
A_BRKEM,
|
||||
A_CLR1,
|
||||
A_CMP4S,
|
||||
A_EXT,
|
||||
A_INS,
|
||||
A_NOT1,
|
||||
A_REPC,
|
||||
A_REPNC,
|
||||
A_ROL4,
|
||||
A_ROR4,
|
||||
A_SET1,
|
||||
A_SUB4S,
|
||||
A_TEST1
|
||||
);
|
||||
|
@ -949,5 +949,19 @@
|
||||
(Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
|
||||
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
|
||||
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
|
||||
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3))
|
||||
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
|
||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
|
||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
|
||||
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
|
||||
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
|
||||
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
|
||||
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
|
||||
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
|
||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||
(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2))
|
||||
);
|
||||
|
Loading…
Reference in New Issue
Block a user