+ added the NEC V20/V30 instructions

git-svn-id: trunk@25750 -
This commit is contained in:
nickysn 2013-10-11 21:27:56 +00:00
parent 376259cc8e
commit f6e846c574
20 changed files with 505 additions and 14 deletions

View File

@ -949,5 +949,19 @@
'rorx',
'sarx',
'shlx',
'shrx'
'shrx',
'add4s',
'brkem',
'clr1',
'cmp4s',
'ext',
'ins',
'not1',
'repc',
'repnc',
'rol4',
'ror4',
'set1',
'sub4s',
'test1'
);

View File

@ -949,5 +949,19 @@ attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE
);

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@ -949,5 +949,19 @@
'rorx',
'sarx',
'shlx',
'shrx'
'shrx',
'add4s',
'brkem',
'clr1',
'cmp4s',
'ext',
'ins',
'not1',
'repc',
'repnc',
'rol4',
'ror4',
'set1',
'sub4s',
'test1'
);

View File

@ -949,5 +949,19 @@ A_BEXTR,
A_RORX,
A_SARX,
A_SHLX,
A_SHRX
A_SHRX,
A_ADD4S,
A_BRKEM,
A_CLR1,
A_CMP4S,
A_EXT,
A_INS,
A_NOT1,
A_REPC,
A_REPNC,
A_ROL4,
A_ROR4,
A_SET1,
A_SUB4S,
A_TEST1
);

View File

@ -949,5 +949,19 @@
(Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3))
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2))
);

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@ -949,5 +949,19 @@
'rorx',
'sarx',
'shlx',
'shrx'
'shrx',
'add4s',
'brkem',
'clr1',
'cmp4s',
'ext',
'ins',
'not1',
'repc',
'repnc',
'rol4',
'ror4',
'set1',
'sub4s',
'test1'
);

View File

@ -949,5 +949,19 @@ attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE
);

View File

@ -949,5 +949,19 @@
'rorx',
'sarx',
'shlx',
'shrx'
'shrx',
'add4s',
'brkem',
'clr1',
'cmp4s',
'ext',
'ins',
'not1',
'repc',
'repnc',
'rol4',
'ror4',
'set1',
'sub4s',
'test1'
);

View File

@ -1,2 +1,2 @@
{ don't edit, this file is generated from x86ins.dat }
1658;
1686;

View File

@ -949,5 +949,19 @@ A_BEXTR,
A_RORX,
A_SARX,
A_SHLX,
A_SHRX
A_SHRX,
A_ADD4S,
A_BRKEM,
A_CLR1,
A_CMP4S,
A_EXT,
A_INS,
A_NOT1,
A_REPC,
A_REPNC,
A_ROL4,
A_ROR4,
A_SET1,
A_SUB4S,
A_TEST1
);

View File

@ -949,5 +949,19 @@
(Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3))
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2))
);

View File

@ -11605,5 +11605,201 @@
optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_reg32,ot_none);
code : #220#242#249#1#247#62#72;
flags : if_bmi2
),
(
opcode : A_ADD4S;
ops : 0;
optypes : (ot_none,ot_none,ot_none,ot_none);
code : #2#15#32;
flags : if_nec or if_16bitonly
),
(
opcode : A_BRKEM;
ops : 1;
optypes : (ot_immediate,ot_none,ot_none,ot_none);
code : #2#15#255#20;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_CLR1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
code : #2#15#18#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_CLR1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
code : #2#15#19#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_CLR1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
code : #2#15#26#128#21;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_CLR1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
code : #2#15#27#128#21;
flags : if_nec or if_sw or if_16bitonly
),
(
opcode : A_CMP4S;
ops : 0;
optypes : (ot_none,ot_none,ot_none,ot_none);
code : #2#15#38;
flags : if_nec or if_16bitonly
),
(
opcode : A_EXT;
ops : 2;
optypes : (ot_reg8,ot_reg8,ot_none,ot_none);
code : #2#15#51#65;
flags : if_nec or if_16bitonly
),
(
opcode : A_EXT;
ops : 2;
optypes : (ot_reg8,ot_immediate,ot_none,ot_none);
code : #2#15#59#128#21;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_INS;
ops : 2;
optypes : (ot_reg8,ot_reg8,ot_none,ot_none);
code : #2#15#49#65;
flags : if_nec or if_16bitonly
),
(
opcode : A_INS;
ops : 2;
optypes : (ot_reg8,ot_immediate,ot_none,ot_none);
code : #2#15#57#128#21;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_NOT1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
code : #2#15#22#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_NOT1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
code : #2#15#23#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_NOT1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
code : #2#15#30#128#21;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_NOT1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
code : #2#15#31#128#21;
flags : if_nec or if_sw or if_16bitonly
),
(
opcode : A_REPC;
ops : 0;
optypes : (ot_none,ot_none,ot_none,ot_none);
code : #1#101;
flags : if_nec or if_pre or if_16bitonly
),
(
opcode : A_REPNC;
ops : 0;
optypes : (ot_none,ot_none,ot_none,ot_none);
code : #1#100;
flags : if_nec or if_pre or if_16bitonly
),
(
opcode : A_ROL4;
ops : 1;
optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
code : #2#15#40#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_ROR4;
ops : 1;
optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
code : #2#15#42#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_SET1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
code : #2#15#20#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_SET1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
code : #2#15#21#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_SET1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
code : #2#15#28#128#21;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_SET1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
code : #2#15#29#128#21;
flags : if_nec or if_sw or if_16bitonly
),
(
opcode : A_SUB4S;
ops : 0;
optypes : (ot_none,ot_none,ot_none,ot_none);
code : #2#15#34;
flags : if_nec or if_16bitonly
),
(
opcode : A_TEST1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
code : #2#15#16#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_TEST1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_reg_cl,ot_none,ot_none);
code : #2#15#17#128;
flags : if_nec or if_16bitonly
),
(
opcode : A_TEST1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
code : #2#15#24#128#21;
flags : if_nec or if_sb or if_16bitonly
),
(
opcode : A_TEST1;
ops : 2;
optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
code : #2#15#25#128#21;
flags : if_nec or if_sw or if_16bitonly
)
);

View File

@ -413,11 +413,19 @@ begin
hs:=readstr;
if x86_64 then
begin
if (upcase(hs)='NOX86_64') then
{ x86_64 }
if (upcase(hs)='NOX86_64') or (upcase(hs)='16BITONLY') then
skip:=true;
end
else if not i8086 then
begin
{ i386 }
if (upcase(hs)='X86_64') or (upcase(hs)='16BITONLY') then
skip:=true;
end
else
begin
{ i8086 }
if (upcase(hs)='X86_64') then
skip:=true;
end;

View File

@ -429,6 +429,7 @@ implementation
IF_AVX = $00200000;
IF_BMI1 = $00200000;
IF_BMI2 = $00200000;
IF_16BITONLY = $00200000;
IF_PLEVEL = $0F000000; { mask for processor level }
IF_8086 = $00000000; { 8086 instruction }
@ -446,6 +447,7 @@ implementation
IF_AMD = $0c000000; { AMD-specific instruction }
IF_CENTAUR = $0d000000; { centaur-specific instruction }
IF_SANDYBRIDGE = $0e000000; { Sandybridge-specific instruction }
IF_NEC = $0f000000; { NEC V20/V30 instruction }
{ added flags }
IF_PRE = $40000000; { it's a prefix instruction }
IF_PASS2 = $80000000; { if the instruction can change in a second pass }

View File

@ -4712,3 +4712,78 @@ reg64,rm64,reg64 \361\362\363\371\1\xf7\76\110 BMI2,X
reg32,rm32,reg32 \334\362\371\1\xf7\76\110 BMI2
reg64,rm64,reg64 \334\362\363\371\1\xf7\76\110 BMI2,X86_64
;*******************************************************************************
;********** NEC V20/V30 ********************************************************
;*******************************************************************************
[ADD4S]
(Ch_All, Ch_None, Ch_None)
void \2\x0F\x20 NEC,16BITONLY
[BRKEM]
(Ch_All, Ch_None, Ch_None)
imm \2\x0F\xFF\24 NEC,SB,16BITONLY
[CLR1]
(Ch_Mop2, Ch_Rop1, Ch_None)
rm8,reg_cl \2\x0F\x12\200 NEC,16BITONLY
rm16,reg_cl \2\x0F\x13\200 NEC,16BITONLY
rm8,imm \2\x0F\x1A\200\25 NEC,SB,16BITONLY
rm16,imm \2\x0F\x1B\200\25 NEC,SW,16BITONLY
[CMP4S]
(Ch_All, Ch_None, Ch_None)
void \2\x0F\x26 NEC,16BITONLY
[EXT]
(Ch_All, Ch_None, Ch_None)
reg8,reg8 \2\x0F\x33\101 NEC,16BITONLY
reg8,imm \2\x0F\x3B\200\25 NEC,SB,16BITONLY
;[FPO2]
[INS]
(Ch_All, Ch_None, Ch_None)
reg8,reg8 \2\x0F\x31\101 NEC,16BITONLY
reg8,imm \2\x0F\x39\200\25 NEC,SB,16BITONLY
[NOT1]
(Ch_Mop2, Ch_Rop1, Ch_None)
rm8,reg_cl \2\x0F\x16\200 NEC,16BITONLY
rm16,reg_cl \2\x0F\x17\200 NEC,16BITONLY
rm8,imm \2\x0F\x1E\200\25 NEC,SB,16BITONLY
rm16,imm \2\x0F\x1F\200\25 NEC,SW,16BITONLY
[REPC]
(Ch_RWECX, Ch_RWFlags, Ch_None)
void \1\x65 NEC,PRE,16BITONLY
[REPNC]
(Ch_RWECX, Ch_RWFlags, Ch_None)
void \1\x64 NEC,PRE,16BITONLY
[ROL4]
(Ch_Mop1, Ch_RWEAX, Ch_None)
rm8 \2\x0F\x28\200 NEC,16BITONLY
[ROR4]
(Ch_Mop1, Ch_RWEAX, Ch_None)
rm8 \2\x0F\x2A\200 NEC,16BITONLY
[SET1]
(Ch_Mop2, Ch_Rop1, Ch_None)
rm8,reg_cl \2\x0F\x14\200 NEC,16BITONLY
rm16,reg_cl \2\x0F\x15\200 NEC,16BITONLY
rm8,imm \2\x0F\x1C\200\25 NEC,SB,16BITONLY
rm16,imm \2\x0F\x1D\200\25 NEC,SW,16BITONLY
[SUB4S]
(Ch_All, Ch_None, Ch_None)
void \2\x0F\x22 NEC,16BITONLY
[TEST1]
(Ch_WFlags, Ch_Rop1, Ch_Rop2)
rm8,reg_cl \2\x0F\x10\200 NEC,16BITONLY
rm16,reg_cl \2\x0F\x11\200 NEC,16BITONLY
rm8,imm \2\x0F\x18\200\25 NEC,SB,16BITONLY
rm16,imm \2\x0F\x19\200\25 NEC,SW,16BITONLY

View File

@ -949,5 +949,19 @@ attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE,
attsufNONE
);

View File

@ -949,5 +949,19 @@
'rorx',
'sarx',
'shlx',
'shrx'
'shrx',
'add4s',
'brkem',
'clr1',
'cmp4s',
'ext',
'ins',
'not1',
'repc',
'repnc',
'rol4',
'ror4',
'set1',
'sub4s',
'test1'
);

View File

@ -949,5 +949,19 @@
'rorx',
'sarx',
'shlx',
'shrx'
'shrx',
'add4s',
'brkem',
'clr1',
'cmp4s',
'ext',
'ins',
'not1',
'repc',
'repnc',
'rol4',
'ror4',
'set1',
'sub4s',
'test1'
);

View File

@ -949,5 +949,19 @@ A_BEXTR,
A_RORX,
A_SARX,
A_SHLX,
A_SHRX
A_SHRX,
A_ADD4S,
A_BRKEM,
A_CLR1,
A_CMP4S,
A_EXT,
A_INS,
A_NOT1,
A_REPC,
A_REPNC,
A_ROL4,
A_ROR4,
A_SET1,
A_SUB4S,
A_TEST1
);

View File

@ -949,5 +949,19 @@
(Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3))
(Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
(Ch: (Ch_RWECX, Ch_RWFlags, Ch_None)),
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
(Ch: (Ch_Mop1, Ch_RWEAX, Ch_None)),
(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
(Ch: (Ch_All, Ch_None, Ch_None)),
(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2))
);