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https://gitlab.com/freepascal.org/fpc/source.git
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* function prologue fixed
This commit is contained in:
mazen
parent
1a6d33860b
commit
f83c707f71
@ -113,14 +113,14 @@ PROCEDURE tcgSPARC.a_param_reg(list:TAasmOutput;size:tcgsize;r:tregister;CONST L
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IF(Size<>OS_32)AND(Size<>OS_S32)
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THEN
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InternalError(2002032212);
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List.Concat(taicpu.op_reg(A_SAVE,S_L,r));
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List.Concat(taicpu.op_reg(A_LD,S_L,r));
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END;
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PROCEDURE tcgSPARC.a_param_const(list:TAasmOutput;size:tcgsize;a:aword;CONST LocPara:TParaLocation);
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BEGIN
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IF(Size<>OS_32)AND(Size<>OS_S32)
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THEN
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InternalError(2002032213);
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List.Concat(taicpu.op_const(A_SAVE,S_L,a));
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List.Concat(taicpu.op_const(A_LD,S_L,a));
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END;
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PROCEDURE tcgSPARC.a_param_ref(list:TAasmOutput;size:tcgsize;CONST r:TReference;CONST LocPara:TParaLocation);
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VAR
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@ -129,7 +129,7 @@ PROCEDURE tcgSPARC.a_param_ref(list:TAasmOutput;size:tcgsize;CONST r:TReference;
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IF((Size=OS_32)AND(Size=OS_S32))
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THEN
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InternalError(2002032214);
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list.concat(taicpu.op_ref(A_SAVE,S_L,r));
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list.concat(taicpu.op_ref(A_LD,S_L,r));
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END;
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PROCEDURE tcgSPARC.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST LocPara:TParaLocation);
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VAR
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@ -140,20 +140,20 @@ PROCEDURE tcgSPARC.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST Loc
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CGMessage(cg_e_cant_use_far_pointer_there);
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IF(r.base=R_NO)AND(r.index=R_NO)
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THEN
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list.concat(Taicpu.Op_sym_ofs(A_SAVE,S_L,r.symbol,r.offset))
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list.concat(Taicpu.Op_sym_ofs(A_LD,S_L,r.symbol,r.offset))
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ELSE IF(r.base=R_NO)AND(r.index<>R_NO)AND
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(r.offset=0)AND(r.scalefactor=0)AND(r.symbol=nil)
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THEN
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list.concat(Taicpu.Op_reg(A_SAVE,S_L,r.index))
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list.concat(Taicpu.Op_reg(A_LD,S_L,r.index))
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ELSE IF(r.base<>R_NO)AND(r.index=R_NO)AND
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(r.offset=0)AND(r.symbol=nil)
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THEN
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list.concat(Taicpu.Op_reg(A_SAVE,S_L,r.base))
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list.concat(Taicpu.Op_reg(A_LD,S_L,r.base))
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ELSE
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BEGIN
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tmpreg:=get_scratch_reg_address(list);
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a_loadaddr_ref_reg(list,r,tmpreg);
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list.concat(taicpu.op_reg(A_SAVE,S_L,tmpreg));
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list.concat(taicpu.op_reg(A_LD,S_L,tmpreg));
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free_scratch_reg(list,tmpreg);
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END;
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END;
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@ -194,7 +194,7 @@ PROCEDURE tcgSPARC.a_load_const_ref(list:TAasmOutput;size:tcgsize;a:aword;CONST
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END;
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PROCEDURE tcgSPARC.a_load_reg_ref(list:TAasmOutput;size:TCGSize;reg:tregister;CONST ref:TReference);
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BEGIN
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list.concat(taicpu.op_reg_ref(A_NONE,TCGSize2OpSize[size],reg,ref));
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list.concat(taicpu.op_reg_ref(A_LD,TCGSize2OpSize[size],reg,ref));
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END;
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PROCEDURE tcgSPARC.a_load_ref_reg(list:TAasmOutput;size:tcgsize;CONST ref:TReference;reg:tregister);
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VAR
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@ -517,7 +517,7 @@ PROCEDURE tcgSPARC.a_op_const_reg(list:TAasmOutput;Op:TOpCG;a:AWord;reg:TRegiste
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{ allocate ecx }
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(rg.getexplicitregisterint(list,R_ECX) = R_ECX))) then
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begin
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list.concat(taicpu.op_reg(A_SAVE,S_L,R_ECX));
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list.concat(taicpu.op_reg(A_NONE,S_L,R_ECX));
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popecx := true;
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end;
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a_load_reg_reg(list,OS_8,OS_8,(src),R_CL);
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@ -776,14 +776,10 @@ PROCEDURE tcgSPARC.g_stackframe_entry(list:TAasmOutput;localsize:LongInt);
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i:integer;
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again:tasmlabel;
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BEGIN
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{Reserve space to save register window in case of overflow/underflow}
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Inc(LocalSize,16);{located between %o6 and %o6+15}
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WITH list DO
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BEGIN
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concat(Taicpu.Op_reg(A_SAVE,S_L,Frame_Pointer_Reg));
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concat(Taicpu.Op_reg_reg(A_NONE,S_L,Stack_Pointer_Reg,Frame_Pointer_Reg));
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IF localsize>0
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THEN
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concat(Taicpu.Op_const_reg(A_SUB,S_L,localsize,Stack_Pointer_Reg));
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END;
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concat(Taicpu.Op_reg_const_reg(A_SAVE,S_L,Stack_Pointer_Reg,localsize,Stack_Pointer_Reg));
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END;
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PROCEDURE tcgSPARC.g_restore_frame_pointer(list:TAasmOutput);
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BEGIN
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@ -453,9 +453,16 @@ CONST
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}
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stab_regindex:ARRAY[tregister]OF ShortInt=({$INCLUDE stabregi.inc});
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{ generic register names }
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stack_pointer_reg =R_O6;
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frame_pointer_reg =R_I6;
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{*************************** generic register names **************************}
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stack_pointer_reg = R_O6;
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frame_pointer_reg = R_I6;
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{the return_result_reg, is used inside the called function to store its return
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value when that is a scalar value otherwise a pointer to the address of the
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result is placed inside it}
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return_result_reg = R_I0;
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{the function_result_reg contains the function result after a call to a scalar
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function othewise it contains a pointer to the returned result}
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function_result_reg = R_O0;
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self_pointer_reg =R_G5;
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{There is no accumulator in the SPARC architecture. There are just families of
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registers. All registers belonging to the same family are identical except in
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@ -573,7 +580,10 @@ FUNCTION flags_to_cond(CONST f:TResFlags):TAsmCond;
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END.
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{
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$Log$
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Revision 1.7 2002-09-27 04:30:53 mazen
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Revision 1.8 2002-09-30 19:12:14 mazen
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* function prologue fixed
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Revision 1.7 2002/09/27 04:30:53 mazen
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* cleanup made
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Revision 1.6 2002/09/24 03:57:53 mazen
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File diff suppressed because it is too large
Load Diff
@ -31,15 +31,17 @@
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UNIT ncpucall;
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{$INCLUDE fpcdefs.inc}
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interface
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uses
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symdef,node,ncal,ncgcal;
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type
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TSparccallnode = class(tcgcallnode)
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function pass_1 : tnode;override;
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procedure load_framepointer;override;
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end;
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uses
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symdef,node,ncal,ncgcal;
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type
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TSparccallnode = class(tcgcallnode)
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function pass_1 : tnode;override;
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{Under SPARC, the frame pointer is automatically set by the SAVE instruction
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which is part of the stardrad calling mechanism. This function will do nothing
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else than adding the function prologue, which is in some case loading the
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correct value into the frame pointer register!}
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procedure load_framepointer;override;
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end;
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implementation
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@ -76,58 +78,19 @@ implementation
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{!!!!}
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end;
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end;
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procedure TSparccallnode.load_framepointer;
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begin
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{ if we call a nested function in a method, we must }
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{ push also SELF! }
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{ THAT'S NOT TRUE, we have to load ESI via frame pointer }
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{ access }
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{
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begin
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loadesi:=false;
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emit_reg(A_PUSH,S_L,R_ESI);
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end;
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}
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{
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if lexlevel=(tprocdef(procdefinition).parast.symtablelevel) then
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begin
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reference_reset_base(href,procinfo^.framepointer,procinfo^.framepointer_offset);
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cg.a_param_ref(exprasmlist,OS_ADDR,href,-1);
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end
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{ this is only true if the difference is one !!
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but it cannot be more !! }
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else if (lexlevel=(tprocdef(procdefinition).parast.symtablelevel)-1) then
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begin
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cg.a_param_reg(exprasmlist,OS_ADDR,procinfo^.framepointer,-1);
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end
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else if (lexlevel>(tprocdef(procdefinition).parast.symtablelevel)) then
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begin
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hregister:=rg.getregisterint(exprasmlist);
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reference_reset_base(href,procinfo^.framepointer,procinfo^.framepointer_offset);
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cg.a_load_ref_reg(exprasmlist,OS_ADDR,href,hregister);
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for i:=(tprocdef(procdefinition).parast.symtablelevel) to lexlevel-1 do
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begin
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{we should get the correct frame_pointer_offset at each level
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how can we do this !!! }
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reference_reset_base(href,hregister,procinfo^.framepointer_offset);
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cg.a_load_ref_reg(exprasmlist,OS_ADDR,href,hregister);
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end;
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cg.a_param_reg(exprasmlist,OS_ADDR,hregister,-1);
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rg.ungetregisterint(exprasmlist,hregister);
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end
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else
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internalerror(2002081303);
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}
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end;
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procedure TSparcCallNode.load_framepointer;
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begin
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exprasmList.concat(TAiCpu.Op_reg_const_reg(A_SAVE,S_L,stack_pointer_reg,-tprocdef(procdefinition).parast.datasize,stack_pointer_reg));
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end;
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begin
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ccallnode:=TSparccallnode;
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end.
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{
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$Log$
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Revision 1.2 2002-08-30 13:16:23 mazen
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Revision 1.3 2002-09-30 19:12:14 mazen
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* function prologue fixed
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Revision 1.2 2002/08/30 13:16:23 mazen
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*call parameter handling is now based on the new param manager
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Revision 1.2 2002/08/17 09:23:49 florian
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@ -1,39 +1,42 @@
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{*****************************************************************************}
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{ File : strregs.inc }
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{ Author : Mazen NEIFER }
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{ Project : Free Pascal Compiler (FPC) }
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{ Creation date : 2002\05\08 }
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{ Last modification date : 2002\06\01 }
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{ Licence : GPL }
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{ file : strregs.inc }
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{ Author : Mazen NEifER }
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{ Project : free Pascal compiler (fPc) }
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{ creation date : 2002\05\08 }
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{ last modification date : 2002\06\01 }
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{ licence : gPl }
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{ Bug report : mazen.neifer.01@supaero.org }
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{*****************************************************************************}
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'NO',
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{General purpose global registers}
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'G0','G1','G2','G3','G4','G5','G6','G7',
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{General purpose out registers}
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'O0','O1','O2','O3','O4','O5','O6','O7',
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{General purpose local registers}
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'L0','L1','L2','L3','L4','L5','L6','L7',
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{General purpose in registers}
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'I0','I1','I2','I3','I4','I5','I6','I7',
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{Floating point registers}
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'F0','F1','F2','F3','F4','F5','F6','F7',
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'F8','F9','F10','F11','F12','F13','F14','F15',
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'F16','F17','F18','F19','F20','F21','F22','F23',
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'F24','F25','F26','F27','F28','F29','F30','F31',
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{Floating point status/"front of queue" registers}
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'FSR','FQ',
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{Coprocessor registers}
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'C0','C1','C2','C3','C4','C5','C6','C7',
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'C8','C9','C10','C11','C12','C13','C14','C15',
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'C16','C17','C18','C19','C20','C21','C22','C23',
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'C24','C25','C26','C27','C28','C29','C30','C31',
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{Coprocessor status/queue registers}
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'CSR','CQ',
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{
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$Id:
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}
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'%No',
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{general purpose global registers}
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'%g0','%g1','%g2','%g3','%g4','%g5','%g6','%g7',
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{general purpose out registers}
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'%o0','%o1','%o2','%o3','%o4','%o5','%o6','%o7',
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{general purpose local registers}
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'%l0','%l1','%l2','%l3','%l4','%l5','%l6','%l7',
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{general purpose in registers}
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'%i0','%i1','%i2','%i3','%i4','%i5','%i6','%i7',
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{floating point registers}
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'%f0','%f1','%f2','%f3','%f4','%f5','%f6','%f7',
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'%f8','%f9','%f10','%f11','%f12','%f13','%f14','%f15',
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'%f16','%f17','%f18','%f19','%f20','%f21','%f22','%f23',
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'%f24','%f25','%f26','%f27','%f28','%f29','%f30','%f31',
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{floating point status/"front of queue" registers}
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'%fSR','%fQ',
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{coprocessor registers}
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'%c0','%c1','%c2','%c3','%c4','%c5','%c6','%c7',
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'%c8','%c9','%c10','%c11','%c12','%c13','%c14','%c15',
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'%c16','%c17','%c18','%c19','%c20','%c21','%c22','%c23',
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'%c24','%c25','%c26','%c27','%c28','%c29','%c30','%c31',
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{coprocessor status/queue registers}
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'%csr','%cq',
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{"Program status"/"Trap vactor base address register"/"Window invalid mask"/Y registers}
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'PSR','TBR','WIM','Y',
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'%psr','%tbr','%wim','%y',
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{Ancillary state registers}
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'ASR0','ASR1','ASR2','ASR3','ASR4','ASR5','ASR6','ASR7',
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'ASR8','ASR9','ASR10','ASR11','ASR12','ASR13','ASR14','ASR15',
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'ASR16','ASR17','ASR18','ASR19','ASR20','ASR21','ASR22','ASR23',
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'ASR24','ASR25','ASR26','ASR27','ASR28','ASR29','ASR30','ASR31'
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'%asr0','%asr1','%asr2','%asr3','%asr4','%asr5','%asr6','%asr7',
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'%asr8','%asr9','%asr10','%asr11','%asr12','%asr13','%asr14','%asr15',
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'%asr16','%asr17','%asr18','%asr19','%asr20','%asr21','%asr22','%asr23',
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'%asr24','%asr25','%asr26','%asr27','%asr28','%asr29','%asr30','%asr31'
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