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* function prologue fixed

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mazen 2002-09-30 19:12:14 +00:00
parent 1a6d33860b
commit f83c707f71
5 changed files with 82 additions and 1697 deletions
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28
compiler/sparc/cgcpu.pas
View File

@ -113,14 +113,14 @@ PROCEDURE tcgSPARC.a_param_reg(list:TAasmOutput;size:tcgsize;r:tregister;CONST L
IF(Size<>OS_32)AND(Size<>OS_S32) IF(Size<>OS_32)AND(Size<>OS_S32)
THEN THEN
InternalError(2002032212); InternalError(2002032212);
List.Concat(taicpu.op_reg(A_SAVE,S_L,r)); List.Concat(taicpu.op_reg(A_LD,S_L,r));
END; END;
PROCEDURE tcgSPARC.a_param_const(list:TAasmOutput;size:tcgsize;a:aword;CONST LocPara:TParaLocation); PROCEDURE tcgSPARC.a_param_const(list:TAasmOutput;size:tcgsize;a:aword;CONST LocPara:TParaLocation);
BEGIN BEGIN
IF(Size<>OS_32)AND(Size<>OS_S32) IF(Size<>OS_32)AND(Size<>OS_S32)
THEN THEN
InternalError(2002032213); InternalError(2002032213);
List.Concat(taicpu.op_const(A_SAVE,S_L,a)); List.Concat(taicpu.op_const(A_LD,S_L,a));
END; END;
PROCEDURE tcgSPARC.a_param_ref(list:TAasmOutput;size:tcgsize;CONST r:TReference;CONST LocPara:TParaLocation); PROCEDURE tcgSPARC.a_param_ref(list:TAasmOutput;size:tcgsize;CONST r:TReference;CONST LocPara:TParaLocation);
VAR VAR
@ -129,7 +129,7 @@ PROCEDURE tcgSPARC.a_param_ref(list:TAasmOutput;size:tcgsize;CONST r:TReference;
IF((Size=OS_32)AND(Size=OS_S32)) IF((Size=OS_32)AND(Size=OS_S32))
THEN THEN
InternalError(2002032214); InternalError(2002032214);
list.concat(taicpu.op_ref(A_SAVE,S_L,r)); list.concat(taicpu.op_ref(A_LD,S_L,r));
END; END;
PROCEDURE tcgSPARC.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST LocPara:TParaLocation); PROCEDURE tcgSPARC.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST LocPara:TParaLocation);
VAR VAR
@ -140,20 +140,20 @@ PROCEDURE tcgSPARC.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST Loc
CGMessage(cg_e_cant_use_far_pointer_there); CGMessage(cg_e_cant_use_far_pointer_there);
IF(r.base=R_NO)AND(r.index=R_NO) IF(r.base=R_NO)AND(r.index=R_NO)
THEN THEN
list.concat(Taicpu.Op_sym_ofs(A_SAVE,S_L,r.symbol,r.offset)) list.concat(Taicpu.Op_sym_ofs(A_LD,S_L,r.symbol,r.offset))
ELSE IF(r.base=R_NO)AND(r.index<>R_NO)AND ELSE IF(r.base=R_NO)AND(r.index<>R_NO)AND
(r.offset=0)AND(r.scalefactor=0)AND(r.symbol=nil) (r.offset=0)AND(r.scalefactor=0)AND(r.symbol=nil)
THEN THEN
list.concat(Taicpu.Op_reg(A_SAVE,S_L,r.index)) list.concat(Taicpu.Op_reg(A_LD,S_L,r.index))
ELSE IF(r.base<>R_NO)AND(r.index=R_NO)AND ELSE IF(r.base<>R_NO)AND(r.index=R_NO)AND
(r.offset=0)AND(r.symbol=nil) (r.offset=0)AND(r.symbol=nil)
THEN THEN
list.concat(Taicpu.Op_reg(A_SAVE,S_L,r.base)) list.concat(Taicpu.Op_reg(A_LD,S_L,r.base))
ELSE ELSE
BEGIN BEGIN
tmpreg:=get_scratch_reg_address(list); tmpreg:=get_scratch_reg_address(list);
a_loadaddr_ref_reg(list,r,tmpreg); a_loadaddr_ref_reg(list,r,tmpreg);
list.concat(taicpu.op_reg(A_SAVE,S_L,tmpreg)); list.concat(taicpu.op_reg(A_LD,S_L,tmpreg));
free_scratch_reg(list,tmpreg); free_scratch_reg(list,tmpreg);
END; END;
END; END;
@ -194,7 +194,7 @@ PROCEDURE tcgSPARC.a_load_const_ref(list:TAasmOutput;size:tcgsize;a:aword;CONST
END; END;
PROCEDURE tcgSPARC.a_load_reg_ref(list:TAasmOutput;size:TCGSize;reg:tregister;CONST ref:TReference); PROCEDURE tcgSPARC.a_load_reg_ref(list:TAasmOutput;size:TCGSize;reg:tregister;CONST ref:TReference);
BEGIN BEGIN
list.concat(taicpu.op_reg_ref(A_NONE,TCGSize2OpSize[size],reg,ref)); list.concat(taicpu.op_reg_ref(A_LD,TCGSize2OpSize[size],reg,ref));
END; END;
PROCEDURE tcgSPARC.a_load_ref_reg(list:TAasmOutput;size:tcgsize;CONST ref:TReference;reg:tregister); PROCEDURE tcgSPARC.a_load_ref_reg(list:TAasmOutput;size:tcgsize;CONST ref:TReference;reg:tregister);
VAR VAR
@ -517,7 +517,7 @@ PROCEDURE tcgSPARC.a_op_const_reg(list:TAasmOutput;Op:TOpCG;a:AWord;reg:TRegiste
{ allocate ecx } { allocate ecx }
(rg.getexplicitregisterint(list,R_ECX) = R_ECX))) then (rg.getexplicitregisterint(list,R_ECX) = R_ECX))) then
begin begin
list.concat(taicpu.op_reg(A_SAVE,S_L,R_ECX)); list.concat(taicpu.op_reg(A_NONE,S_L,R_ECX));
popecx := true; popecx := true;
end; end;
a_load_reg_reg(list,OS_8,OS_8,(src),R_CL); a_load_reg_reg(list,OS_8,OS_8,(src),R_CL);
@ -776,14 +776,10 @@ PROCEDURE tcgSPARC.g_stackframe_entry(list:TAasmOutput;localsize:LongInt);
i:integer; i:integer;
again:tasmlabel; again:tasmlabel;
BEGIN BEGIN
{Reserve space to save register window in case of overflow/underflow}
Inc(LocalSize,16);{located between %o6 and %o6+15}
WITH list DO WITH list DO
BEGIN concat(Taicpu.Op_reg_const_reg(A_SAVE,S_L,Stack_Pointer_Reg,localsize,Stack_Pointer_Reg));
concat(Taicpu.Op_reg(A_SAVE,S_L,Frame_Pointer_Reg));
concat(Taicpu.Op_reg_reg(A_NONE,S_L,Stack_Pointer_Reg,Frame_Pointer_Reg));
IF localsize>0
THEN
concat(Taicpu.Op_const_reg(A_SUB,S_L,localsize,Stack_Pointer_Reg));
END;
END; END;
PROCEDURE tcgSPARC.g_restore_frame_pointer(list:TAasmOutput); PROCEDURE tcgSPARC.g_restore_frame_pointer(list:TAasmOutput);
BEGIN BEGIN

18
compiler/sparc/cpubase.pas
View File

@ -453,9 +453,16 @@ CONST
} }
stab_regindex:ARRAY[tregister]OF ShortInt=({$INCLUDE stabregi.inc}); stab_regindex:ARRAY[tregister]OF ShortInt=({$INCLUDE stabregi.inc});
{ generic register names } {*************************** generic register names **************************}
stack_pointer_reg =R_O6; stack_pointer_reg = R_O6;
frame_pointer_reg =R_I6; frame_pointer_reg = R_I6;
{the return_result_reg, is used inside the called function to store its return
value when that is a scalar value otherwise a pointer to the address of the
result is placed inside it}
return_result_reg = R_I0;
{the function_result_reg contains the function result after a call to a scalar
function othewise it contains a pointer to the returned result}
function_result_reg = R_O0;
self_pointer_reg =R_G5; self_pointer_reg =R_G5;
{There is no accumulator in the SPARC architecture. There are just families of {There is no accumulator in the SPARC architecture. There are just families of
registers. All registers belonging to the same family are identical except in registers. All registers belonging to the same family are identical except in
@ -573,7 +580,10 @@ FUNCTION flags_to_cond(CONST f:TResFlags):TAsmCond;
END. END.
{ {
$Log$ $Log$
Revision 1.7 2002-09-27 04:30:53 mazen Revision 1.8 2002-09-30 19:12:14 mazen
* function prologue fixed
Revision 1.7 2002/09/27 04:30:53 mazen
* cleanup made * cleanup made
Revision 1.6 2002/09/24 03:57:53 mazen Revision 1.6 2002/09/24 03:57:53 mazen

1587
compiler/sparc/ncgcall.pas
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File diff suppressed because it is too large Load Diff

75
compiler/sparc/ncpucall.pas
View File

@ -31,15 +31,17 @@
UNIT ncpucall; UNIT ncpucall;
{$INCLUDE fpcdefs.inc} {$INCLUDE fpcdefs.inc}
interface interface
uses
uses symdef,node,ncal,ncgcal;
symdef,node,ncal,ncgcal; type
TSparccallnode = class(tcgcallnode)
type function pass_1 : tnode;override;
TSparccallnode = class(tcgcallnode) {Under SPARC, the frame pointer is automatically set by the SAVE instruction
function pass_1 : tnode;override; which is part of the stardrad calling mechanism. This function will do nothing
procedure load_framepointer;override; else than adding the function prologue, which is in some case loading the
end; correct value into the frame pointer register!}
procedure load_framepointer;override;
end;
implementation implementation
@ -76,58 +78,19 @@ implementation
{!!!!} {!!!!}
end; end;
end; end;
procedure TSparcCallNode.load_framepointer;
procedure TSparccallnode.load_framepointer; begin
exprasmList.concat(TAiCpu.Op_reg_const_reg(A_SAVE,S_L,stack_pointer_reg,-tprocdef(procdefinition).parast.datasize,stack_pointer_reg));
begin end;
{ if we call a nested function in a method, we must }
{ push also SELF! }
{ THAT'S NOT TRUE, we have to load ESI via frame pointer }
{ access }
{
begin
loadesi:=false;
emit_reg(A_PUSH,S_L,R_ESI);
end;
}
{
if lexlevel=(tprocdef(procdefinition).parast.symtablelevel) then
begin
reference_reset_base(href,procinfo^.framepointer,procinfo^.framepointer_offset);
cg.a_param_ref(exprasmlist,OS_ADDR,href,-1);
end
{ this is only true if the difference is one !!
but it cannot be more !! }
else if (lexlevel=(tprocdef(procdefinition).parast.symtablelevel)-1) then
begin
cg.a_param_reg(exprasmlist,OS_ADDR,procinfo^.framepointer,-1);
end
else if (lexlevel>(tprocdef(procdefinition).parast.symtablelevel)) then
begin
hregister:=rg.getregisterint(exprasmlist);
reference_reset_base(href,procinfo^.framepointer,procinfo^.framepointer_offset);
cg.a_load_ref_reg(exprasmlist,OS_ADDR,href,hregister);
for i:=(tprocdef(procdefinition).parast.symtablelevel) to lexlevel-1 do
begin
{we should get the correct frame_pointer_offset at each level
how can we do this !!! }
reference_reset_base(href,hregister,procinfo^.framepointer_offset);
cg.a_load_ref_reg(exprasmlist,OS_ADDR,href,hregister);
end;
cg.a_param_reg(exprasmlist,OS_ADDR,hregister,-1);
rg.ungetregisterint(exprasmlist,hregister);
end
else
internalerror(2002081303);
}
end;
begin begin
ccallnode:=TSparccallnode; ccallnode:=TSparccallnode;
end. end.
{ {
$Log$ $Log$
Revision 1.2 2002-08-30 13:16:23 mazen Revision 1.3 2002-09-30 19:12:14 mazen
* function prologue fixed
Revision 1.2 2002/08/30 13:16:23 mazen
*call parameter handling is now based on the new param manager *call parameter handling is now based on the new param manager
Revision 1.2 2002/08/17 09:23:49 florian Revision 1.2 2002/08/17 09:23:49 florian

71
compiler/sparc/strregs.inc
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@ -1,39 +1,42 @@
{*****************************************************************************} {*****************************************************************************}
{ File : strregs.inc } { file : strregs.inc }
{ Author : Mazen NEIFER } { Author : Mazen NEifER }
{ Project : Free Pascal Compiler (FPC) } { Project : free Pascal compiler (fPc) }
{ Creation date : 2002\05\08 } { creation date : 2002\05\08 }
{ Last modification date : 2002\06\01 } { last modification date : 2002\06\01 }
{ Licence : GPL } { licence : gPl }
{ Bug report : mazen.neifer.01@supaero.org } { Bug report : mazen.neifer.01@supaero.org }
{*****************************************************************************} {*****************************************************************************}
'NO', {
{General purpose global registers} $Id:
'G0','G1','G2','G3','G4','G5','G6','G7', }
{General purpose out registers} '%No',
'O0','O1','O2','O3','O4','O5','O6','O7', {general purpose global registers}
{General purpose local registers} '%g0','%g1','%g2','%g3','%g4','%g5','%g6','%g7',
'L0','L1','L2','L3','L4','L5','L6','L7', {general purpose out registers}
{General purpose in registers} '%o0','%o1','%o2','%o3','%o4','%o5','%o6','%o7',
'I0','I1','I2','I3','I4','I5','I6','I7', {general purpose local registers}
{Floating point registers} '%l0','%l1','%l2','%l3','%l4','%l5','%l6','%l7',
'F0','F1','F2','F3','F4','F5','F6','F7', {general purpose in registers}
'F8','F9','F10','F11','F12','F13','F14','F15', '%i0','%i1','%i2','%i3','%i4','%i5','%i6','%i7',
'F16','F17','F18','F19','F20','F21','F22','F23', {floating point registers}
'F24','F25','F26','F27','F28','F29','F30','F31', '%f0','%f1','%f2','%f3','%f4','%f5','%f6','%f7',
{Floating point status/"front of queue" registers} '%f8','%f9','%f10','%f11','%f12','%f13','%f14','%f15',
'FSR','FQ', '%f16','%f17','%f18','%f19','%f20','%f21','%f22','%f23',
{Coprocessor registers} '%f24','%f25','%f26','%f27','%f28','%f29','%f30','%f31',
'C0','C1','C2','C3','C4','C5','C6','C7', {floating point status/"front of queue" registers}
'C8','C9','C10','C11','C12','C13','C14','C15', '%fSR','%fQ',
'C16','C17','C18','C19','C20','C21','C22','C23', {coprocessor registers}
'C24','C25','C26','C27','C28','C29','C30','C31', '%c0','%c1','%c2','%c3','%c4','%c5','%c6','%c7',
{Coprocessor status/queue registers} '%c8','%c9','%c10','%c11','%c12','%c13','%c14','%c15',
'CSR','CQ', '%c16','%c17','%c18','%c19','%c20','%c21','%c22','%c23',
'%c24','%c25','%c26','%c27','%c28','%c29','%c30','%c31',
{coprocessor status/queue registers}
'%csr','%cq',
{"Program status"/"Trap vactor base address register"/"Window invalid mask"/Y registers} {"Program status"/"Trap vactor base address register"/"Window invalid mask"/Y registers}
'PSR','TBR','WIM','Y', '%psr','%tbr','%wim','%y',
{Ancillary state registers} {Ancillary state registers}
'ASR0','ASR1','ASR2','ASR3','ASR4','ASR5','ASR6','ASR7', '%asr0','%asr1','%asr2','%asr3','%asr4','%asr5','%asr6','%asr7',
'ASR8','ASR9','ASR10','ASR11','ASR12','ASR13','ASR14','ASR15', '%asr8','%asr9','%asr10','%asr11','%asr12','%asr13','%asr14','%asr15',
'ASR16','ASR17','ASR18','ASR19','ASR20','ASR21','ASR22','ASR23', '%asr16','%asr17','%asr18','%asr19','%asr20','%asr21','%asr22','%asr23',
'ASR24','ASR25','ASR26','ASR27','ASR28','ASR29','ASR30','ASR31' '%asr24','%asr25','%asr26','%asr27','%asr28','%asr29','%asr30','%asr31'