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m68k: preparations for upcoming full instruction tables, mostly converting code away from using sets of opcodes

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git-svn-id: trunk@45307 -
This commit is contained in:
Károly Balogh 2020-05-07 23:30:13 +00:00
parent f8e7d0bc09
commit fc5c35362b
5 changed files with 18 additions and 11 deletions
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3
compiler/m68k/ag68kgas.pas
View File

@ -329,7 +329,8 @@ interface
sep:=#9
else
if (i=2) and
(op in [A_DIVSL,A_DIVUL,A_MULS,A_MULU,A_DIVS,A_DIVU,A_REMS,A_REMU]) then
((op=A_DIVSL) or (op=A_DIVUL) or (op=A_MULS) or (op=A_MULU) or
(op=A_DIVS) or (op=A_DIVU) or (op=A_REMS) or (op=A_REMU)) then
sep:=':'
else
sep:=',';

5
compiler/m68k/aoptcpu.pas
View File

@ -150,7 +150,8 @@ unit aoptcpu;
end;
p := taicpu(hp);
Result :=
((p.opcode in [A_MOVE,A_MOVEA,A_MVS,A_MVZ,A_MOVEQ,A_LEA]) and
(((p.opcode=A_MOVE) or (p.opcode=A_MOVEA) or (p.opcode=A_MVS) or
(p.opcode=A_MVZ) or (p.opcode=A_MOVEQ) or (p.opcode=A_LEA)) and
(p.oper[1]^.typ = top_reg) and
(SuperRegistersEqual(p.oper[1]^.reg,reg)) and
((p.oper[0]^.typ = top_const) or
@ -351,7 +352,7 @@ unit aoptcpu;
if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
begin
DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
if taicpu(p).opcode in [A_SUB,A_SUBA] then
if (taicpu(p).opcode=A_SUB) or (taicpu(p).opcode=A_SUBA) then
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
else
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);

10
compiler/m68k/cgcpu.pas
View File

@ -1843,10 +1843,12 @@ unit cgcpu;
{ MUL/DIV always sets the overflow flag, and never the carry flag }
{ Note/Fixme: This still doesn't cover the ColdFire, where none of these opcodes
set either the overflow or the carry flag. So CF must be handled in other ways. }
if taicpu(list.last).opcode in [A_MULU,A_MULS,A_DIVS,A_DIVU,A_DIVUL,A_DIVSL] then
cond:=C_VC
else
cond:=C_CC;
case taicpu(list.last).opcode of
A_MULU,A_MULS,A_DIVS,A_DIVU,A_DIVUL,A_DIVSL:
cond:=C_VC;
else
cond:=C_CC;
end;
end;
ai:=Taicpu.Op_Sym(A_Bxx,S_NO,hl);
ai.SetCondition(cond);

2
compiler/m68k/ra68kmot.pas
View File

@ -179,7 +179,7 @@ const
{ Also filter the helper opcodes, they can't be valid
while reading an assembly source }
case actopcode of
A_NONE, A_LABEL, A_DBXX, A_SXX, A_BXX, A_FBXX:
A_NONE, A_DBXX, A_SXX, A_BXX, A_FBXX:
begin
end;
else

9
compiler/m68k/rgcpu.pas
View File

@ -145,7 +145,9 @@ unit rgcpu;
(get_alias(getsupreg(instr.oper[0]^.reg))=orgreg) then
begin
{ source can be replaced if dest is register... }
if ((instr.oper[1]^.typ=top_reg) and (instr.opcode in [A_MOVE,A_ADD,A_SUB,A_AND,A_OR,A_CMP])) or
if ((instr.oper[1]^.typ=top_reg) and
((instr.opcode=A_MOVE) or (instr.opcode=A_ADD) or (instr.opcode=A_SUB) or
(instr.opcode=A_AND) or (instr.opcode=A_OR) or (instr.opcode=A_CMP))) or
{... or a "simple" reference in case of MOVE }
((instr.opcode=A_MOVE) and (instr.oper[1]^.typ=top_ref) and isvalidmovedest(instr.oper[1]^.ref)) then
opidx:=0;
@ -153,11 +155,12 @@ unit rgcpu;
else if (instr.oper[1]^.typ=top_reg) and (getregtype(instr.oper[1]^.reg)=regtype) and
(get_alias(getsupreg(instr.oper[1]^.reg))=orgreg) and
((
(instr.opcode in [A_MOVE,A_ADD,A_SUB,A_AND,A_OR]) and
((instr.opcode=A_MOVE) or (instr.opcode=A_ADD) or (instr.opcode=A_SUB) or
(instr.opcode=A_AND) or (instr.opcode=A_OR)) and
(instr.oper[0]^.typ=top_reg) and not
(isaddressregister(instr.oper[0]^.reg))
) or
(instr.opcode in [A_ADDQ,A_SUBQ,A_MOV3Q])) then
((instr.opcode=A_ADDQ) or (instr.opcode=A_SUBQ) or (instr.opcode=A_MOV3Q))) then
opidx:=1;
end;
else