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+ implemented x86-64 mov optimization to test register usage tracking framework
git-svn-id: trunk@20892 -
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@ -41,6 +41,7 @@ uses
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cutils,
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verbose,
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cgbase, cgutils,
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aoptobj,
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aasmbase, aasmdata, aasmcpu;
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function isFoldableArithOp(hp1: taicpu; reg: tregister): boolean;
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@ -49,11 +50,11 @@ begin
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case hp1.opcode of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND, A_SHL, A_SHR, A_SAR:
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isFoldableArithOp :=
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = reg) and
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((taicpu(hp1).oper[0]^.typ = top_const) or
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((taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg<>reg))) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = reg);
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(taicpu(hp1).oper[0]^.reg<>reg)));
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A_INC, A_DEC:
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isFoldableArithOp :=
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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@ -65,6 +66,8 @@ function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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next1: tai;
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hp1, hp2: tai;
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GetNextIntruction_p : boolean;
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TmpUsedRegs : TAllUsedRegs;
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begin
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Result := False;
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case p.typ of
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@ -92,7 +95,7 @@ begin
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taicpu(hp1).oper[0]^.val);
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asml.remove(p);
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p.Free;
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p := hp1;
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p:=hp1;
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end;
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(* else
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{change "and x, reg; jxx" to "test x, reg", if reg is deallocated before the
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@ -108,8 +111,11 @@ begin
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A_MOV:
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{ removes superfluous And's after mov's }
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begin
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if not(cs_opt_level3 in current_settings.optimizerswitches) then
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exit;
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GetNextIntruction_p:=GetNextInstruction(p, hp1);
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if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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GetNextIntruction_p and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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@ -122,7 +128,65 @@ begin
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asml.remove(hp1);
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hp1.free;
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end;
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end;
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end
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else if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextIntruction_p and
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(hp1.typ = ait_instruction) and
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GetNextInstruction(hp1, hp2) and
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(hp2.typ = ait_instruction) and
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(taicpu(hp2).opcode = A_MOV) and
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(taicpu(hp2).oper[0]^.typ = top_reg) and
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OpsEqual(taicpu(hp2).oper[1]^, taicpu(p).oper[0]^) and
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(IsFoldableArithOp(taicpu(hp1), taicpu(p).oper[1]^.reg) or
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((taicpu(p).opsize=S_L) and (taicpu(hp1).opsize=S_Q) and
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IsFoldableArithOp(taicpu(hp1), newreg(R_INTREGISTER,getsupreg(taicpu(p).oper[1]^.reg),R_SUBQ)))
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) then
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{ change movsX/movzX reg/ref, reg2 }
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{ add/sub/or/... reg3/$const, reg2 }
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{ mov reg2 reg/ref }
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{ to add/sub/or/... reg3/$const, reg/ref }
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begin
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CopyUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.next));
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UpdateUsedRegs(TmpUsedRegs, tai(hp1.next));
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If not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp2,TmpUsedRegs)) then
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begin
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{ by example:
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movswl %si,%eax movswl %si,%eax p
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decl %eax addl %edx,%eax hp1
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movw %ax,%si movw %ax,%si hp2
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->
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movswl %si,%eax movswl %si,%eax p
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decw %eax addw %edx,%eax hp1
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movw %ax,%si movw %ax,%si hp2
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}
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taicpu(hp1).changeopsize(taicpu(hp2).opsize);
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{
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->
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movswl %si,%eax movswl %si,%eax p
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decw %si addw %dx,%si hp1
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movw %ax,%si movw %ax,%si hp2
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}
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case taicpu(hp1).ops of
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1:
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taicpu(hp1).loadoper(0, taicpu(hp2).oper[1]^);
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2:
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taicpu(hp1).loadoper(1, taicpu(hp2).oper[1]^);
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else
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internalerror(2008042701);
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end;
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{
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->
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decw %si addw %dx,%si p
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}
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asml.remove(p);
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asml.remove(hp2);
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p.Free;
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hp2.Free;
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p := hp1;
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end;
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ReleaseUsedRegs(TmpUsedRegs);
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end
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end;
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A_MOVSX,
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A_MOVZX:
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@ -190,26 +254,28 @@ begin
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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case taicpu(p).opsize of
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S_BL, S_BW, S_BQ:
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if (taicpu(hp1).oper[0]^.val = $ff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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begin
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case taicpu(p).opsize of
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S_BL, S_BW, S_BQ:
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if (taicpu(hp1).oper[0]^.val = $ff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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S_WL, S_WQ:
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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S_LQ:
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if (taicpu(hp1).oper[0]^.val = $ffffffff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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end;
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S_WL, S_WQ:
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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S_LQ:
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if (taicpu(hp1).oper[0]^.val = $ffffffff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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end;
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end;
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{ changes some movzx constructs to faster synonims (all examples
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are given with eax/ax, but are also valid for other registers)}
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if (taicpu(p).oper[1]^.typ = top_reg) then
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