mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-11-02 11:09:33 +01:00
* peephole added for non-longint:=non-longint+X
git-svn-id: trunk@9329 -
This commit is contained in:
peter
parent
0c06fddb8f
commit
fcb37c4fa4
@ -43,6 +43,26 @@ uses
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{$endif finaldestdebug}
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cpuinfo,cpubase,cgutils,daopt386;
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function isFoldableArithOp(hp1: taicpu; reg: tregister): boolean;
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begin
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isFoldableArithOp := False;
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case hp1.opcode of
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A_ADD,A_SUB,A_OR,A_XOR,A_AND,A_SHL,A_SHR,A_SAR:
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isFoldableArithOp :=
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((taicpu(hp1).oper[0]^.typ = top_const) or
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((taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg <> reg))) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = reg);
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A_INC,A_DEC:
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isFoldableArithOp :=
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg = reg);
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end;
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end;
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function RegUsedAfterInstruction(reg: Tregister; p: tai; var UsedRegs: TRegSet): Boolean;
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var
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supreg: tsuperregister;
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@ -1237,141 +1257,169 @@ begin
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p.free;
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end;
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end;
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A_MOVZX:
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A_MOVSX,
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A_MOVZX :
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begin
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{removes superfluous And's after movzx's}
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if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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case taicpu(p).opsize Of
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S_BL, S_BW:
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if (taicpu(hp1).oper[0]^.val = $ff) then
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begin
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asml.remove(hp1);
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hp1.free;
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end;
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S_WL:
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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begin
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asml.remove(hp1);
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hp1.free;
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end;
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end;
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{changes some movzx constructs to faster synonims (all examples
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are given with eax/ax, but are also valid for other registers)}
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if (taicpu(p).oper[1]^.typ = top_reg) then
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if (taicpu(p).oper[0]^.typ = top_reg) then
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case taicpu(p).opsize of
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S_BW:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzbw %al, %ax" to "andw $0x0ffh, %ax"}
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GetNextInstruction(p,hp1) and
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(hp1.typ = ait_instruction) and
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IsFoldableArithOp(taicpu(hp1),taicpu(p).oper[1]^.reg) and
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GetNextInstruction(hp1,hp2) and
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(hp2.typ = ait_instruction) and
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(taicpu(hp2).opcode = A_MOV) and
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(taicpu(hp2).oper[0]^.typ = top_reg) and
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OpsEqual(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) then
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{ change movsX/movzX reg/ref, reg2 }
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{ add/sub/or/... reg3/$const, reg2 }
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{ mov reg2 reg/ref }
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{ to add/sub/or/... reg3/$const, reg/ref }
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begin
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taicpu(hp1).opsize:=taicpu(hp2).opsize;
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taicpu(hp1).loadoper(1,taicpu(hp2).oper[1]^);
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asml.remove(p);
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asml.remove(hp2);
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p.free;
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hp2.free;
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p := hp1
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end
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{ removes superfluous And's after movzx's }
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else if taicpu(p).opcode=A_MOVZX then
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begin
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if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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case taicpu(p).opsize Of
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S_BL, S_BW:
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if (taicpu(hp1).oper[0]^.val = $ff) then
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_W);
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taicpu(p).loadConst(0,$ff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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{Change "movzbw %reg1, %reg2; andw $const, %reg2"
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to "movw %reg1, reg2; andw $(const1 and $ff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_W);
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setsubreg(taicpu(p).oper[0]^.reg,R_SUBW);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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asml.remove(hp1);
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hp1.free;
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end;
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end;
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S_BL:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzbl %al, %eax" to "andl $0x0ffh, %eax"}
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S_WL:
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_L);
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taicpu(p).loadConst(0,$ff)
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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{Change "movzbl %reg1, %reg2; andl $const, %reg2"
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to "movl %reg1, reg2; andl $(const1 and $ff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_L);
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setsubreg(taicpu(p).oper[0]^.reg,R_SUBWHOLE);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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end
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end;
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S_WL:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzwl %ax, %eax" to "andl $0x0ffffh, %eax"}
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_L);
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taicpu(p).loadConst(0,$ffff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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{Change "movzwl %reg1, %reg2; andl $const, %reg2"
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to "movl %reg1, reg2; andl $(const1 and $ffff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_L);
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setsubreg(taicpu(p).oper[0]^.reg,R_SUBWHOLE);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ffff);
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asml.remove(hp1);
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hp1.free;
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end;
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end;
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end
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else if (taicpu(p).oper[0]^.typ = top_ref) then
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begin
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if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = Top_Const) and
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(taicpu(hp1).oper[1]^.typ = Top_Reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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begin
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taicpu(p).opcode := A_MOV;
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case taicpu(p).opsize Of
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S_BL:
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end;
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{changes some movzx constructs to faster synonims (all examples
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are given with eax/ax, but are also valid for other registers)}
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if (taicpu(p).oper[1]^.typ = top_reg) then
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if (taicpu(p).oper[0]^.typ = top_reg) then
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case taicpu(p).opsize of
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S_BW:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzbw %al, %ax" to "andw $0x0ffh, %ax"}
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begin
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taicpu(p).changeopsize(S_L);
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_W);
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taicpu(p).loadConst(0,$ff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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{Change "movzbw %reg1, %reg2; andw $const, %reg2"
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to "movw %reg1, reg2; andw $(const1 and $ff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_W);
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setsubreg(taicpu(p).oper[0]^.reg,R_SUBW);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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end;
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S_WL:
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end;
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S_BL:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzbl %al, %eax" to "andl $0x0ffh, %eax"}
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_L);
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taicpu(p).loadConst(0,$ff)
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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{Change "movzbl %reg1, %reg2; andl $const, %reg2"
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to "movl %reg1, reg2; andl $(const1 and $ff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_L);
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setsubreg(taicpu(p).oper[0]^.reg,R_SUBWHOLE);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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end
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end;
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S_WL:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzwl %ax, %eax" to "andl $0x0ffffh, %eax"}
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_L);
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taicpu(p).loadConst(0,$ffff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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{Change "movzwl %reg1, %reg2; andl $const, %reg2"
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to "movl %reg1, reg2; andl $(const1 and $ffff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_L);
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setsubreg(taicpu(p).oper[0]^.reg,R_SUBWHOLE);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ffff);
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end;
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S_BW:
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begin
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taicpu(p).changeopsize(S_W);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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end;
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end;
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end
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else if (taicpu(p).oper[0]^.typ = top_ref) then
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begin
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if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = Top_Const) and
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(taicpu(hp1).oper[1]^.typ = Top_Reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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begin
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taicpu(p).opcode := A_MOV;
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case taicpu(p).opsize Of
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S_BL:
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begin
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taicpu(p).changeopsize(S_L);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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end;
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S_WL:
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begin
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taicpu(p).changeopsize(S_L);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ffff);
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end;
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S_BW:
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begin
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taicpu(p).changeopsize(S_W);
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taicpu(hp1).loadConst(0,taicpu(hp1).oper[0]^.val and $ff);
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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(* should not be generated anymore by the current code generator
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A_POP:
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begin
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@ -1666,25 +1714,6 @@ begin
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end;
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function isFoldableArithOp(hp1: taicpu; reg: tregister): boolean;
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begin
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isFoldableArithOp := False;
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case hp1.opcode of
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A_ADD,A_SUB,A_OR,A_XOR,A_AND,A_SHL,A_SHR,A_SAR:
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isFoldableArithOp :=
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((taicpu(hp1).oper[0]^.typ = top_const) or
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((taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg <> reg))) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = reg);
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A_INC,A_DEC:
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isFoldableArithOp :=
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg = reg);
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end;
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end;
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procedure PeepHoleOptPass2(asml: TAsmList; BlockStart, BlockEnd: tai);
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{$ifdef USECMOV}
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