* ensure that left and right have a result type set in tx86addnode.pass_1, resolves #40727

This commit is contained in:
florian 2024-04-08 22:53:02 +02:00
parent bad42011ab
commit fd68d3bfbb
2 changed files with 28 additions and 1 deletions

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@ -1236,8 +1236,18 @@ unit nx86add;
function tx86addnode.pass_1: tnode;
begin
{ only pass_1 might set the resultdef as it could be set to nil by some previous
code transformation. As we need a valid left/right.resultdef later on, ensure
a valid result def is set, see also issue #40727 }
if not(assigned(left.resultdef)) then
typecheckpass(left);
if not(assigned(right.resultdef)) then
typecheckpass(right);
{ on x86, we do not support fpu registers, so in case of operations using the x87, it
is normally useful, not to put the operands into registers which would be mm register }
is normally useful, not to put the operands into registers which would be mm register
this should be called before pass_1 so we have a proper expectloc }
if ((left.resultdef.typ=floatdef) or (right.resultdef.typ=floatdef)) and
(not(use_vectorfpu(left.resultdef)) and not(use_vectorfpu(right.resultdef)) and
not(use_vectorfpu(resultdef))) then

17
tests/webtbs/tw40727.pp Normal file
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@ -0,0 +1,17 @@
{ %opt=-O4 }
program project1;
// {$O-}
procedure vec3(y: single);
begin
{$i-} WriteLn(y);
end;
var
u: single = 0;
const
achse = 3.0;
begin
vec3(u + 5 - achse);
end.