paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-04-06 04:29:42 +02:00
Code Issues Packages Projects Releases Wiki Activity

* TARMAsmOptimizer.USxtOp2Op sets register size if needed

Browse Source
This commit is contained in:
florian 2024-07-07 15:41:13 +02:00
parent 26c69d564f
commit fd74c26707
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
compiler/armgen/aoptarm.pas
View File

@ -231,6 +231,8 @@ Implementation
else
opoffset:=1;
taicpu(hp1).loadReg(opoffset+1,taicpu(p).oper[1]^.reg);
if not(shiftmode in [SM_SXTX,SM_UXTX,SM_LSL]) then
setsubreg(taicpu(hp1).oper[opoffset+1]^.reg,R_SUBD);
taicpu(hp1).ops:=opoffset+3;
shifterop_reset(so);
so.shiftmode:=shiftmode;