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Disabled preindex/postindexed peephole optimizations for Thumb and Thumb2

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git-svn-id: trunk@25156 -
This commit is contained in:
Jeppe Johansen 2013-07-21 14:21:16 +00:00
parent 0977d76f42
commit fdcc68cfd7
1 changed files with 3 additions and 2 deletions
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5
compiler/arm/aoptcpu.pas
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@ -420,7 +420,8 @@ Implementation
var var
hp1: tai; hp1: tai;
begin begin
if (p.ops=3) and if (current_settings.cputype in cpu_arm) and
(p.ops=3) and
MatchOperand(p.oper[0]^, p.oper[1]^.reg) and MatchOperand(p.oper[0]^, p.oper[1]^.reg) and
GetNextInstructionUsingReg(p, hp1, p.oper[0]^.reg) and GetNextInstructionUsingReg(p, hp1, p.oper[0]^.reg) and
(not RegModifiedBetween(p.oper[0]^.reg, p, hp1)) and (not RegModifiedBetween(p.oper[0]^.reg, p, hp1)) and
@ -499,7 +500,7 @@ Implementation
{ don't apply the optimization if the (new) index register is loaded } { don't apply the optimization if the (new) index register is loaded }
(p.oper[0]^.reg<>taicpu(hp1).oper[2]^.reg) and (p.oper[0]^.reg<>taicpu(hp1).oper[2]^.reg) and
not(RegModifiedBetween(taicpu(hp1).oper[2]^.reg,p,hp1)) and not(RegModifiedBetween(taicpu(hp1).oper[2]^.reg,p,hp1)) and
not(current_settings.cputype in cpu_thumb) then (current_settings.cputype in cpu_arm) then
begin begin
DebugMsg('Peephole Str/LdrAdd/Sub2Str/Ldr Postindex done', p); DebugMsg('Peephole Str/LdrAdd/Sub2Str/Ldr Postindex done', p);
p.oper[1]^.ref^.addressmode:=AM_POSTINDEXED; p.oper[1]^.ref^.addressmode:=AM_POSTINDEXED;