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- removed no more used constants

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git-svn-id: trunk@18199 -
This commit is contained in:
florian 2011-08-13 20:54:01 +00:00
parent 6b2a566fb1
commit ff5f311b34
8 changed files with 1 additions and 249 deletions
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27
compiler/alpha/cpubase.pas
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@ -155,40 +155,13 @@ unit cpubase;
LoReg = R_0;
HiReg = R_31;
{ Constant defining possibly all registers which might require saving }
ALL_REGISTERS = [firstreg..lastreg];
general_registers = [R_0..R_31];
availabletempregsint = [R_0..R_14,R_16..R_25,R_28];
availabletempregsfpu = [R_F0..R_F30];
availabletempregsmm = [];
intregs = [R_0..R_31];
usableregsint = [];
c_countusableregsint = 26;
maxfpuregs = 32;
fpuregs = [R_F0..R_F31];
usableregsfpu = [];
c_countusableregsfpu = 31;
mmregs = [];
usableregsmm = [];
c_countusableregsmm = 0;
max_operands = 4;
registers_saved_on_cdecl = [R_9..R_14,R_F2..R_F9];
firstsaveintreg = R_NO;
lastsaveintreg = R_NO;
firstsavefpureg = R_NO;
lastsavefpureg = R_NO;
firstsavemmreg = R_NO;
lastsavemmreg = R_NO;
maxvarregs = 6;
varregs : Array [1..maxvarregs] of Tregister =
(R_9,R_10,R_11,R_12,R_13,R_14);

33
compiler/arm/cpubase.pas
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@ -213,42 +213,9 @@ unit cpubase;
const
max_operands = 4;
{# Constant defining possibly all registers which might require saving }
ALL_OTHERREGISTERS = [];
general_superregisters = [RS_R0..RS_PC];
{# Table of registers which can be allocated by the code generator
internally, when generating the code.
}
{ legend: }
{ xxxregs = set of all possibly used registers of that type in the code }
{ generator }
{ usableregsxxx = set of all 32bit components of registers that can be }
{ possible allocated to a regvar or using getregisterxxx (this }
{ excludes registers which can be only used for parameter }
{ passing on ABI's that define this) }
{ c_countusableregsxxx = amount of registers in the usableregsxxx set }
maxintregs = 15;
{ to determine how many registers to use for regvars }
maxintscratchregs = 3;
usableregsint = [RS_R4..RS_R10];
c_countusableregsint = 7;
maxfpuregs = 8;
fpuregs = [RS_F0..RS_F7];
usableregsfpu = [RS_F4..RS_F7];
c_countusableregsfpu = 4;
mmregs = [RS_D0..RS_D15];
usableregsmm = [RS_D8..RS_D15];
c_countusableregsmm = 8;
maxaddrregs = 0;
addrregs = [];
usableregsaddr = [];
c_countusableregsaddr = 0;
{*****************************************************************************
Operand Sizes

33
compiler/avr/cpubase.pas
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@ -169,42 +169,9 @@ unit cpubase;
const
max_operands = 4;
{# Constant defining possibly all registers which might require saving }
ALL_OTHERREGISTERS = [];
general_superregisters = [RS_R0..RS_R31];
{# Table of registers which can be allocated by the code generator
internally, when generating the code.
}
{ legend: }
{ xxxregs = set of all possibly used registers of that type in the code }
{ generator }
{ usableregsxxx = set of all 32bit components of registers that can be }
{ possible allocated to a regvar or using getregisterxxx (this }
{ excludes registers which can be only used for parameter }
{ passing on ABI's that define this) }
{ c_countusableregsxxx = amount of registers in the usableregsxxx set }
maxintregs = 15;
{ to determine how many registers to use for regvars }
maxintscratchregs = 3;
usableregsint = [RS_R4..RS_R10];
c_countusableregsint = 7;
maxfpuregs = 0;
fpuregs = [];
usableregsfpu = [];
c_countusableregsfpu = 0;
mmregs = [];
usableregsmm = [];
c_countusableregsmm = 0;
maxaddrregs = 0;
addrregs = [];
usableregsaddr = [];
c_countusableregsaddr = 0;
{*****************************************************************************
Operand Sizes

26
compiler/i386/cpubase.inc
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@ -48,30 +48,6 @@
}
std_op2str:op2strtable={$i i386int.inc}
{*****************************************************************************
Constants
*****************************************************************************}
c_countusableregsint = 4;
{
firstsaveintreg = RS_EAX;
lastsaveintreg = RS_EDX;
firstsavefpureg = RS_INVALID;
lastsavefpureg = RS_INVALID;
firstsavemmreg = RS_MM0;
lastsavemmreg = RS_MM7;
general_superregisters = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
maxvarregs = 4;
varregs : array[1..maxvarregs] of tsuperregister =
(RS_EBX,RS_EDX,RS_ECX,RS_EAX);
maxfpuvarregs = 8;
maxmmvarregs = 8;
}
{*****************************************************************************
GDB Information
*****************************************************************************}
@ -169,5 +145,3 @@
PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
}
std_param_align = 4;

33
compiler/mips/cpubase.pas
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@ -134,42 +134,9 @@ unit cpubase;
const
max_operands = 4;
{ Constant defining possibly all registers which might require saving }
ALL_OTHERREGISTERS = [];
general_superregisters = [RS_R0..RS_R31];
{ Table of registers which can be allocated by the code generator
internally, when generating the code.
}
{ legend: }
{ xxxregs = set of all possibly used registers of that type in the code }
{ generator }
{ usableregsxxx = set of all 32bit components of registers that can be }
{ possible allocated to a regvar or using getregisterxxx (this }
{ excludes registers which can be only used for parameter }
{ passing on ABI's that define this) }
{ c_countusableregsxxx = amount of registers in the usableregsxxx set }
maxintregs = 31;
{ to determine how many registers to use for regvars }
maxintscratchregs = 3;
usableregsint = [RS_R4..RS_R10];
c_countusableregsint = 7;
maxfpuregs = 8;
fpuregs = [RS_F0..RS_F7];
usableregsfpu = [RS_F4..RS_F7];
c_countusableregsfpu = 4;
mmregs = [RS_NO..RS_NO];
usableregsmm = [RS_NO..RS_NO];
c_countusableregsmm = 0;
maxaddrregs = 0;
addrregs = [];
usableregsaddr = [];
c_countusableregsaddr = 0;
{*****************************************************************************
Operand Sizes

56
compiler/sparc/cpubase.pas
View File

@ -161,50 +161,9 @@ uses
const
max_operands = 3;
{# Constant defining possibly all registers which might require saving }
ALL_OTHERREGISTERS = [];
general_superregisters = [RS_O0..RS_I7];
{# Table of registers which can be allocated by the code generator
internally, when generating the code.
}
{ legend: }
{ xxxregs = set of all possibly used registers of that type in the code }
{ generator }
{ usableregsxxx = set of all 32bit components of registers that can be }
{ possible allocated to a regvar or using getregisterxxx (this }
{ excludes registers which can be only used for parameter }
{ passing on ABI's that define this) }
{ c_countusableregsxxx = amount of registers in the usableregsxxx set }
maxintregs = 8;
{ to determine how many registers to use for regvars }
maxintscratchregs = 3;
usableregsint = [RS_L0..RS_L7];
c_countusableregsint = 8;
maxfpuregs = 8;
usableregsfpu=[RS_F0..RS_F31];
c_countusableregsfpu=32;
mmregs = [];
usableregsmm = [];
c_countusableregsmm = 0;
{ no distinction on this platform }
maxaddrregs = 0;
addrregs = [];
usableregsaddr = [];
c_countusableregsaddr = 0;
{ TODO: firstsaveintreg shall be RS_NO}
firstsaveintreg = RS_L0; { Temporary, having RS_NO is broken }
lastsaveintreg = RS_L0; { L0..L7 are already saved, I0..O7 are parameter }
firstsavefpureg = RS_F2; { F0..F1 is used for return value }
lastsavefpureg = RS_F31;
firstsavemmreg = RS_INVALID;
lastsavemmreg = RS_INVALID;
maxvarregs = 8;
varregs : Array [1..maxvarregs] of Tsuperregister =
@ -214,19 +173,6 @@ uses
fpuvarregs : Array [1..maxfpuvarregs] of TsuperRegister =
(RS_F2);
{
max_param_regs_int = 6;
param_regs_int: Array[1..max_param_regs_int] of TCpuRegister =
(R_3,R_4,R_5,R_6,R_7,R_8,R_9,R_10);
max_param_regs_fpu = 13;
param_regs_fpu: Array[1..max_param_regs_fpu] of TCpuRegister =
(R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,R_F10,R_F11,R_F12,R_F13);
max_param_regs_mm = 13;
param_regs_mm: Array[1..max_param_regs_mm] of TCpuRegister =
(R_M1,R_M2,R_M3,R_M4,R_M5,R_M6,R_M7,R_M8,R_M9,R_M10,R_M11,R_M12,R_M13);
}
{*****************************************************************************
@ -306,7 +252,7 @@ uses
{ this is only for the generic code which is not used for this architecture }
saved_mm_registers : array[0..0] of tsuperregister = (RS_NO);
{# Required parameter alignment when calling a routine declared as
stdcall and cdecl. The alignment value should be the one defined
by GCC or the target ABI.

35
compiler/vis/cpubase.pas
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@ -374,44 +374,9 @@ uses
LoReg = R_R0;
HiReg = R_R11;
{# Table of registers which can be allocated by the code generator
internally, when generating the code.
}
{ legend: }
{ xxxregs = set of all possibly used registers of that type in the code }
{ generator }
{ usableregsxxx = set of all 32bit components of registers that can be }
{ possible allocated to a regvar or using getregisterxxx (this }
{ excludes registers which can be only used for parameter }
{ passing on ABI's that define this) }
{ c_countusableregsxxx = amount of registers in the usableregsxxx set }
maxintregs = 12;
intregs = [R_R0..R_R11];
usableregsint = [R_R2..R_R11];
c_countusableregsint = 18;
maxfpuregs = 16;
fpuregs = [R_FP0..R_FP15];
usableregsfpu = [R_FP1..R_FP15];
c_countusableregsfpu = 15;
mmregs = [];
usableregsmm = [];
c_countusableregsmm = 0;
{ no distinction on this platform }
maxaddrregs = 0;
addrregs = [];
usableregsaddr = [];
c_countusableregsaddr = 0;
firstsaveintreg = R_R2;
lastsaveintreg = R_R11;
firstsavefpureg = R_FP1;
lastsavefpureg = R_FP15;
firstsavemmreg = R_NO;
lastsavemmreg = R_NO;
maxvarregs = 10;
varregs : Array [1..maxvarregs] of toldregister =

7
compiler/x86_64/cpubase.inc
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@ -48,13 +48,6 @@ const
}
std_op2str:op2strtable={$i x8664int.inc}
{*****************************************************************************
Constants
*****************************************************************************}
const
c_countusableregsint = 4;
{*****************************************************************************
GDB Information
*****************************************************************************}