From ff78c930c51ed7b776dda8079c0ebfcbf287ff23 Mon Sep 17 00:00:00 2001 From: pierre Date: Tue, 2 Oct 2012 23:35:02 +0000 Subject: [PATCH] Fix problem in 64bit substraction git-svn-id: trunk@22521 - --- compiler/mips/cgcpu.pas | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/compiler/mips/cgcpu.pas b/compiler/mips/cgcpu.pas index 0c9b77c759..3bd7be9463 100644 --- a/compiler/mips/cgcpu.pas +++ b/compiler/mips/cgcpu.pas @@ -2007,8 +2007,7 @@ begin list.concat(taicpu.op_reg_reg_reg(A_SUBU, regdst.reglo, NR_R0, regsrc.reglo)); list.concat(taicpu.op_reg_reg_reg(A_SLTU, tmpreg1, NR_R0, regdst.reglo)); list.concat(taicpu.op_reg_reg_reg(A_SUBU, regdst.reghi, NR_R0, regsrc.reghi)); - list.concat(taicpu.op_reg_reg_reg(A_SUBU, tmpreg1, regdst.reghi, tmpreg1)); - list.concat(Taicpu.Op_reg_reg(A_MOVE, regdst.reghi, tmpreg1)); + list.concat(taicpu.op_reg_reg_reg(A_SUBU, regdst.reghi, regdst.reghi, tmpreg1)); exit; end; OP_NOT: @@ -2119,10 +2118,10 @@ begin tmpreg2 := cg.GetIntRegister(list,OS_S32); // destreg.reglo could be regsrc1.reglo or regsrc2.reglo list.concat(taicpu.op_reg_reg_reg(A_SUBU,tmpreg1, regsrc2.reglo, regsrc1.reglo)); - list.concat(taicpu.op_reg_reg_reg(A_SLTU, tmpreg2, regsrc2.reglo, regsrc1.reglo)); - list.concat(taicpu.op_reg_reg(A_MOVE, regdst.reglo, tmpreg1)); - list.concat(taicpu.op_reg_reg_reg(A_ADDU, regsrc1.reghi, regsrc1.reghi, tmpreg2)); + list.concat(taicpu.op_reg_reg_reg(A_SLTU, tmpreg2, regsrc2.reglo,tmpreg1)); list.concat(taicpu.op_reg_reg_reg(A_SUBU, regdst.reghi, regsrc2.reghi, regsrc1.reghi)); + list.concat(taicpu.op_reg_reg_reg(A_SUBU, regdst.reghi, regdst.reghi, tmpreg2)); + list.concat(taicpu.op_reg_reg(A_MOVE, regdst.reglo, tmpreg1)); exit; end; OP_XOR: