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Fix ShiftShift2Shift 1 ARM-peephole optimizer

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The previous code deleted the newly inserted instruction instead of the
existing one, which obviously broke code.

Assembly:
  mov r0, r0, lsr #23
  mov r0, r0, lsr #23

transformed into:
  mov r0, r0, lsr #23

expected was:
  mov r0, #0

The problem only shows up in the very unlikely case of two LSR/ASR or
two LSL following on each other and having a total shift of more than 31
bits.

This fixes test/opt/tarmshift.pp

I've also removed the {%norun} directive from tarmshift.pp as this test
does only make sense when it also runs.

git-svn-id: trunk@25374 -
This commit is contained in:
masta 2013-08-26 17:41:54 +00:00
parent 0fafe77d27
commit ff95d42216
2 changed files with 3 additions and 4 deletions
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6
compiler/arm/aoptcpu.pas
View File

@ -838,10 +838,10 @@ Implementation
SM_LSR, SM_LSR,
SM_LSL: SM_LSL:
begin begin
hp1:=taicpu.op_reg_const(A_MOV,taicpu(p).oper[0]^.reg,0); hp2:=taicpu.op_reg_const(A_MOV,taicpu(p).oper[0]^.reg,0);
InsertLLItem(p.previous, p.next, hp1); InsertLLItem(p.previous, p.next, hp2);
p.free; p.free;
p:=hp1; p:=hp2;
end; end;
else else
internalerror(2008072803); internalerror(2008072803);

1
tests/test/opt/tarmshift.pp
View File

@ -1,4 +1,3 @@
{ %norun }
{ %opt=-O2 } { %opt=-O2 }
var var
i : longint; i : longint;