tg74
4dc5442fa5
support vector operand writemask,zeroflag
...
git-svn-id: branches/tg74/avx512@39359 -
2018-07-02 20:20:03 +00:00
tg74
31e4d4ef5e
AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
...
git-svn-id: branches/tg74/avx512@39196 -
2018-06-08 06:53:35 +00:00
florian
8b0bbdcaab
* fix flag subregs after r38206
...
git-svn-id: trunk@38502 -
2018-03-11 20:30:11 +00:00
pierre
ba3afefa4c
Regenerate register include files after commit 37564: Fix value of NR_DR6 and NR_DR7
...
git-svn-id: trunk@37565 -
2017-11-07 07:30:42 +00:00
nickysn
c8487c4150
+ added individual bits of the x86 flags register as subregisters
...
git-svn-id: trunk@35955 -
2017-04-26 13:52:52 +00:00
nickysn
5f66f5cebb
+ distinguish between x86 flags subregisters: flags, eflags and rflags
...
git-svn-id: trunk@35953 -
2017-04-25 16:10:43 +00:00
sergei
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
...
git-svn-id: trunk@25627 -
2013-10-03 08:08:04 +00:00
nickysn
125a6a8720
* register id of (e)flags changed, so it doesn't overlap with dr0
...
git-svn-id: trunk@24647 -
2013-05-30 16:40:59 +00:00
florian
283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
...
git-svn-id: trunk@22568 -
2012-10-06 19:47:18 +00:00
Jonas Maebe
f7dbe6d7a6
* use a different register constant for EIP and RIP (fixes external
...
assembler writers on x86-64 after r22181, the shift in positions
caused every occurrence of RIP to become EIP in the assembler code)
git-svn-id: trunk@22234 -
2012-08-24 18:49:17 +00:00
florian
4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
...
git-svn-id: trunk@22181 -
2012-08-22 19:38:27 +00:00
florian
588e2c38bf
* dwarf branch merged
2004-06-16 20:07:06 +00:00
peter
1367e342db
* reg allocations for imaginary register are now inserted just
...
before reg allocation
* tregister changed to enum to allow compile time check
* fixed several tregister-tsuperregister errors
2003-12-15 21:25:48 +00:00
peter
6a8d5eb25d
* NEWRA branch merged
2003-09-03 15:55:00 +00:00
