tg74
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4dc5442fa5
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support vector operand writemask,zeroflag
git-svn-id: branches/tg74/avx512@39359 -
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2018-07-02 20:20:03 +00:00 |
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florian
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8c0d5411d0
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* dwarf numbers corrected
* zmm14 definition fixed
+ commented definitions for bnd/k registers added
* made reg. cound a longint
git-svn-id: branches/tg74/avx512@39209 -
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2018-06-10 14:17:37 +00:00 |
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tg74
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31e4d4ef5e
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AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
git-svn-id: branches/tg74/avx512@39196 -
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2018-06-08 06:53:35 +00:00 |
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nickysn
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c8487c4150
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+ added individual bits of the x86 flags register as subregisters
git-svn-id: trunk@35955 -
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2017-04-26 13:52:52 +00:00 |
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nickysn
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5f66f5cebb
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+ distinguish between x86 flags subregisters: flags, eflags and rflags
git-svn-id: trunk@35953 -
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2017-04-25 16:10:43 +00:00 |
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sergei
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5af873ee5b
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
git-svn-id: trunk@25627 -
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2013-10-03 08:08:04 +00:00 |
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florian
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283ff05127
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* merged avx support in inline assembler developed by Torsten Grundke
git-svn-id: trunk@22568 -
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2012-10-06 19:47:18 +00:00 |
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florian
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4dee21c60e
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+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
git-svn-id: trunk@22181 -
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2012-08-22 19:38:27 +00:00 |
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florian
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b1c8bfc478
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+ x86_64 pic draft
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2005-02-06 00:05:56 +00:00 |
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florian
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588e2c38bf
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* dwarf branch merged
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2004-06-16 20:07:06 +00:00 |
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