6 Commits

Author	SHA1	Message	Date
tg74	4dc5442fa5	support vector operand writemask,zeroflag ... git-svn-id: branches/tg74/avx512@39359 -	2018-07-02 20:20:03 +00:00
tg74	31e4d4ef5e	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512 ... git-svn-id: branches/tg74/avx512@39196 -	2018-06-08 06:53:35 +00:00
nickysn	c8487c4150	+ added individual bits of the x86 flags register as subregisters ... git-svn-id: trunk@35955 -	2017-04-26 13:52:52 +00:00
nickysn	5f66f5cebb	+ distinguish between x86 flags subregisters: flags, eflags and rflags ... git-svn-id: trunk@35953 -	2017-04-25 16:10:43 +00:00
florian	2ec5a649d7	* set Ch_* for more operations ... * Ch_* flags for VMOVSD and VMOVSS are now set for the 2 operand variants git-svn-id: trunk@26586 -	2014-01-26 12:37:50 +00:00
pierre	42140bd11f	Add forgotten new file, should fix bug report 25571 ... git-svn-id: trunk@26554 -	2014-01-21 14:17:29 +00:00