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Commit Graph

364 Commits

Author SHA1 Message Date
nickysn
b164f5aa65 + support relative jumps in the Z80 internal asm writer 
git-svn-id: trunk@45280 -
 2020-05-05 23:42:09 +00:00
nickysn
0a09359906 + support the RST instruction in the Z80 internal asm writer 
git-svn-id: trunk@45279 -
 2020-05-05 23:30:44 +00:00
nickysn
43686720c3 + fix for conditional JP in the Z80 internal asm writer 
git-svn-id: trunk@45275 -
 2020-05-05 22:45:40 +00:00
nickysn
3e14eddaf6 + support conditional operations in the Z80 internal asm 
git-svn-id: trunk@45274 -
 2020-05-05 22:42:21 +00:00
nickysn
58d6d64fba + Z80 internal asm: support OT_REF_ADDR16 in taicpu.gencode.WrinteNN 
git-svn-id: trunk@45273 -
 2020-05-05 22:30:49 +00:00
nickysn
4fed57adc1 + lots of fixes to the Z80 internal asm writer 
git-svn-id: trunk@45272 -
 2020-05-05 22:18:44 +00:00
nickysn
3ab5acccb1 * the parameter of WriteWord should be word, not byte :) 
git-svn-id: trunk@45269 -
 2020-05-05 20:35:08 +00:00
nickysn
256597be58 + Z80 internal asm: produce correct opcodes for register operands 
git-svn-id: trunk@45250 -
 2020-05-04 02:17:30 +00:00
nickysn
90ee079cd1 + partial implementation of pass2 asm opcode generation for the Z80 internal asm writer 
git-svn-id: trunk@45249 -
 2020-05-04 01:27:44 +00:00
nickysn
5d2be4da1c * Z80: match both signed and unsigned 16-bit constants as OT_IMM16 in the asm instab lookup 
git-svn-id: trunk@45248 -
 2020-05-04 00:20:50 +00:00
nickysn
27e9dde81a + implemented pass1 (calcsize) of the instruction encoding for the Z80 internal asm 
git-svn-id: trunk@45247 -
 2020-05-04 00:14:28 +00:00
nickysn
19c1ecda54 + started work on the Z80 internal assembler 
git-svn-id: trunk@45191 -
 2020-04-30 14:27:48 +00:00
nickysn
9b1eebd333 + z80: add operand info to the result of taicpu.GetString, this makes the 
compiler produce nicer error messages, when it encounters an invalid
  instruction in inline asm code

git-svn-id: trunk@45187 -
 2020-04-30 00:17:29 +00:00
nickysn
34112c932c + handle OT_IMM8 and OT_IMM16 for getting symbol addresses in taicpu.Matches 
git-svn-id: trunk@45185 -
 2020-04-29 23:45:09 +00:00
nickysn
a79d12ae41 + handle OT_RELJMP8 in taicpu.Matches 
git-svn-id: trunk@45184 -
 2020-04-29 23:39:47 +00:00
nickysn
4c021c100a + handle OT_REG8_C_PORT in taicpu.Matches 
git-svn-id: trunk@45183 -
 2020-04-29 23:30:43 +00:00
nickysn
a063a53863 + handle OT_IMM_PORT in taicpu.Matches 
git-svn-id: trunk@45182 -
 2020-04-29 23:23:20 +00:00
nickysn
552107f577 + z80: implemented taicpu.CheckIfValid 
git-svn-id: trunk@45181 -
 2020-04-29 22:21:40 +00:00
nickysn
d5b8e49da2 + z80: implemented taicpu.FindInsentry 
git-svn-id: trunk@45180 -
 2020-04-29 22:12:51 +00:00
nickysn
5e90aa27d5 - z80: oops, forgot to delete some code from taicpu.Matches 
git-svn-id: trunk@45179 -
 2020-04-29 21:46:42 +00:00
nickysn
e08c7b3642 + z80: added condition checking in taicpu.Matches 
git-svn-id: trunk@45178 -
 2020-04-29 21:38:41 +00:00
nickysn
7f769f024b * Z80: fixed code generation for pure assembler routines, that have no parameters, no local variables 
and no 'nostackframe'

git-svn-id: trunk@45176 -
 2020-04-29 19:44:57 +00:00
nickysn
365e320119 + partial implementation of taicpu.Matches 
git-svn-id: trunk@45175 -
 2020-04-29 16:25:52 +00:00
nickysn
20e2a0efac + added Z80 register AF' 
git-svn-id: trunk@45174 -
 2020-04-29 16:00:25 +00:00
nickysn
6654faea08 + build an instruction table cache for the Z80 
git-svn-id: trunk@45173 -
 2020-04-29 14:53:21 +00:00
nickysn
f8c2d4a632 * added comment, stating that Z80 has no condition subsets 
git-svn-id: trunk@45172 -
 2020-04-29 12:19:59 +00:00
nickysn
cfb28c7654 * fixed bug, causing the global variable stacksize to be destroyed 
git-svn-id: trunk@45171 -
 2020-04-29 02:00:26 +00:00
Károly Balogh
60c73dd14b z80: fix typo in the previous commit 
git-svn-id: trunk@45164 -
 2020-04-28 23:10:35 +00:00
Károly Balogh
04bd105cf5 z80: fix global symbols and section attributes in the vasm writer 
git-svn-id: trunk@45163 -
 2020-04-28 23:10:03 +00:00
nickysn
86e04ddd5c + enable the sdasz80 lameness check permanently, because the system unit now 
compiles, and it's important to catch other similar errors also

git-svn-id: trunk@45158 -
 2020-04-28 19:34:38 +00:00
nickysn
07a8af33b1 + z80: generate correct code in do_spill_read and do_spill_written for spilling to temp offsets outside the range -128..127 
git-svn-id: trunk@45157 -
 2020-04-28 19:31:11 +00:00
nickysn
6dbe1368ef + z80: added range checking for d in the (IX+d) and (IY+d) addressing modes in 
the sdasz80 assembler writer, because sdasz80 silently truncates d to shortint
  which produces broken code and hides bugs in the z80 code generator. The check
  is behind ifdef, because the system unit doesn't compile, when this check is
  enabled, due to bugs that were previously unnoticed. When these bugs are
  fixed, the ifdef will be removed.

git-svn-id: trunk@45156 -
 2020-04-28 18:49:50 +00:00
pierre
a506fe9560 Fix cross-compilation on aarch64-linux using -dFPC_SOFT_FPUX80 option 
git-svn-id: trunk@45154 -
 2020-04-28 18:35:53 +00:00
Károly Balogh
23fc0fe66a z80: added quick & dirty vasm assembler support to the target 
git-svn-id: trunk@45152 -
 2020-04-28 01:23:31 +00:00
Károly Balogh
db1ef439b5 z80: sdasz80 won't do section smartlinking for us, but it's used for the zx spectrum target 
git-svn-id: trunk@45151 -
 2020-04-28 01:17:29 +00:00
nickysn
491462fd02 + added another helper for register pairs: register_in 
git-svn-id: trunk@45150 -
 2020-04-28 00:18:49 +00:00
nickysn
a5d36e1bc6 + added Z80 helper functions is_regpair and split_regpair 
git-svn-id: trunk@45149 -
 2020-04-28 00:05:53 +00:00
nickysn
69c95115f6 - removed GetHigh, GetNextReg, GetLastReg, GetOffsetReg and GetOffsetReg64 from cpubase. The methods 
in cg should be used instead, because they do better error checking on the register used.

git-svn-id: trunk@45147 -
 2020-04-27 22:03:36 +00:00
nickysn
9cca44d3af * tcputype.cpu_ez80 renamed .cpu_zilog_ez80 
git-svn-id: branches/z80@45139 -
 2020-04-27 15:49:14 +00:00
nickysn
784237ee33 * tcputype.cpu_z80 renamed .cpu_zilog_z80 
git-svn-id: branches/z80@45138 -
 2020-04-27 15:47:52 +00:00
nickysn
368f4412c4 * handle nf_swapped properly in TZ80AddNode.second_cmp16_32_64bit 
git-svn-id: branches/z80@45128 -
 2020-04-26 22:09:37 +00:00
nickysn
647725ea0c * optimizations in tcgz80.normalize_ref 
git-svn-id: branches/z80@45127 -
 2020-04-26 21:36:13 +00:00
nickysn
5a5a8602d3 * optimization in tcgz80.a_load_const_cgpara for pushing longints, where the low 16 bits are equal 
to the high 16 bits (works for e.g. 0)

git-svn-id: branches/z80@45126 -
 2020-04-26 21:12:15 +00:00
nickysn
3338603bb8 * generate better code in tcgz80.a_loadaddr_ref_reg 
git-svn-id: branches/z80@45125 -
 2020-04-26 20:58:52 +00:00
nickysn
44d95ef7c8 + generate better code in op_const_reg for OP_ADD and OP_SUB by using in certain cases A_DEC for OP_SUB 
and A_INC for OP_ADD

git-svn-id: branches/z80@45120 -
 2020-04-26 17:24:53 +00:00
nickysn
7957560fba + implemented tcgz80.a_adjust_sp 
git-svn-id: branches/z80@45116 -
 2020-04-26 17:04:15 +00:00
nickysn
723faf14a9 - removed GetByteLoc, because it isn't used 
git-svn-id: branches/z80@45113 -
 2020-04-26 16:44:14 +00:00
nickysn
ff0c771e2e - removed unused local vars 
git-svn-id: branches/z80@45112 -
 2020-04-26 16:42:19 +00:00
nickysn
9b9197c06e * formatting 
git-svn-id: branches/z80@45111 -
 2020-04-26 16:42:03 +00:00
nickysn
5de66f75a0 - removed commented out code from tcgz80.a_cmp_reg_reg_label 
git-svn-id: branches/z80@45110 -
 2020-04-26 16:41:44 +00:00
nickysn
ab8f9cc707 - removed commented out code from tcgz80.done_register_allocators 
git-svn-id: branches/z80@45109 -
 2020-04-26 16:40:52 +00:00
nickysn
1713176078 - removed commented out code from tcgz80.a_load_reg_cgpara 
git-svn-id: branches/z80@45108 -
 2020-04-26 16:40:21 +00:00
nickysn
3d5452cda3 - removed commented out code from tcgz80.a_load_ref_cgpara 
git-svn-id: branches/z80@45107 -
 2020-04-26 16:39:36 +00:00
nickysn
ab6d9e9df9 - removed tcgz80.maybegetcpuregister, because it isn't used 
git-svn-id: branches/z80@45106 -
 2020-04-26 16:38:29 +00:00
nickysn
05ca71133f + implemented OP_MUL/OP_IMUL in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@45105 -
 2020-04-26 16:37:53 +00:00
nickysn
3a80895e34 * fixed section writing with smartlinking the sdcc-sdasz80 asm writer 
git-svn-id: branches/z80@45103 -
 2020-04-26 15:35:03 +00:00
nickysn
3d81dd0b00 * ReplaceForbiddenAsmSymbolChars renamed ApplyAsmSymbolRestrictions, because now it also applies the 
label length limit

git-svn-id: branches/z80@45085 -
 2020-04-26 10:42:07 +00:00
nickysn
4165e3224a - removed some commented out code that won't be needed 
git-svn-id: branches/z80@45084 -
 2020-04-26 10:36:17 +00:00
nickysn
db4581041a * moved $EXTRAOPT before $OBJ 
git-svn-id: branches/z80@45075 -
 2020-04-25 16:42:31 +00:00
nickysn
3580c53b05 + enabled library-based smart linking for the ZX Spectrum target (not fully working yet) 
git-svn-id: branches/z80@45071 -
 2020-04-25 14:09:38 +00:00
nickysn
91289fddf4 + emit a label in g_intf_wrapper, even though the entire function is not yet implemented. For now, this 
is enough to avoid linking errors

git-svn-id: branches/z80@45068 -
 2020-04-25 13:45:37 +00:00
nickysn
2e55f9f4ab + support ait_realconst in the SDCC-SDASZ80 asm output 
git-svn-id: branches/z80@45067 -
 2020-04-25 13:12:18 +00:00
nickysn
a8fe46c0f5 + introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the 
output label to that length

git-svn-id: branches/z80@45066 -
 2020-04-25 12:59:25 +00:00
nickysn
084b4187f8 * dollar sign changed to dollar in the SDCC-SDASZ80 asm output 
git-svn-id: branches/z80@45065 -
 2020-04-25 12:38:52 +00:00
nickysn
2bcd6f4c17 + apply ReplaceForbiddenAsmSymbolChars to all symbols in the SDCC-SDASZ80 assembler output 
git-svn-id: branches/z80@45064 -
 2020-04-25 12:38:23 +00:00
nickysn
b15c66b396 * fixed tcgz80.a_call_reg 
git-svn-id: branches/z80@45062 -
 2020-04-25 11:06:58 +00:00
nickysn
4b88e8f48e * fixed label placement in tcgz80.a_cmp_const_reg_label for 16-bit/32-bit operations OC_GT,OC_LT,OC_GTE,OC_LTE,OC_BE,OC_B,OC_AE,OC_A 
git-svn-id: branches/z80@45061 -
 2020-04-25 09:44:34 +00:00
nickysn
6014305708 - removed debug writeln 
git-svn-id: branches/z80@45055 -
 2020-04-24 19:15:52 +00:00
nickysn
9c7f1a7cab * synchronized with trunk 
git-svn-id: branches/z80@45046 -
 2020-04-24 03:30:29 +00:00
nickysn
9d1a9354c2 * set the correct expectloc in the first pass for pointer comparisons on the Z80 
git-svn-id: branches/z80@45039 -
 2020-04-23 14:00:38 +00:00
nickysn
0a017f1634 - removed unused method TZ80AddNode.NoEqual 
git-svn-id: branches/z80@45038 -
 2020-04-23 12:54:00 +00:00
nickysn
4a0ad586d0 + implemented record copy in tcgz80.a_load_ref_cgpara 
git-svn-id: branches/z80@45035 -
 2020-04-23 03:14:09 +00:00
nickysn
992602afcb * fixed 64-bit OP_NOT 
git-svn-id: branches/z80@45034 -
 2020-04-23 03:10:39 +00:00
nickysn
86bc22528a - removed some commented out code from tcpuparamanager.get_funcretloc 
git-svn-id: branches/z80@45026 -
 2020-04-23 02:33:41 +00:00
nickysn
3a5544ea63 - removed the the OS_64 and OS_F64-related code from tcpuparamanager.get_funcretloc 
git-svn-id: branches/z80@45025 -
 2020-04-23 02:32:54 +00:00
nickysn
89b8bd3848 + added a Z80-specific override for tcgz80.a_loadfpu_ref_cgpara, to support returning single results 
in registers

git-svn-id: branches/z80@45024 -
 2020-04-23 02:29:46 +00:00
nickysn
5c6fadada8 + return singles in the same registers as 32-bit ints 
git-svn-id: branches/z80@45023 -
 2020-04-23 02:17:03 +00:00
nickysn
088cfd5da5 * write a warning in the assembler output, instead of stopping with an internal error in 
tcgz80.a_op_reg_reg_internal for OP_MUL/OP_IMUL, so that more RTL code can be compiled

git-svn-id: branches/z80@45022 -
 2020-04-23 02:07:25 +00:00
nickysn
cae8a928c9 * fixed tz80loadparentfpnode.pass_generate_code to return result in an imaginary register sequence, 
instead of simply returning IX

git-svn-id: branches/z80@45020 -
 2020-04-23 01:40:13 +00:00
nickysn
770822382f + implemented all the remaining 16-bit and 32-bit comparisons in tcgz80.a_cmp_const_reg_label 
git-svn-id: branches/z80@45019 -
 2020-04-23 00:57:21 +00:00
nickysn
d54a2b7cb6 * generate an internal error in tcgz80.a_cmp_reg_reg_label, because that's not yet implemented 
git-svn-id: branches/z80@45018 -
 2020-04-23 00:40:23 +00:00
nickysn
38d3bdc60e + allow fromsize>tosize in tcgz80.a_load_ref_reg 
git-svn-id: branches/z80@45017 -
 2020-04-23 00:36:22 +00:00
nickysn
9c461d90bd + handle ref.base=NR_HL/NR_BC/NR_SP in tcgz80.a_loadaddr_ref_reg 
git-svn-id: branches/z80@45009 -
 2020-04-22 22:37:20 +00:00
nickysn
3014378ad2 + support OS_32,OS_S32 in tcgz80.a_load_reg_cgpara 
git-svn-id: branches/z80@45006 -
 2020-04-22 22:04:15 +00:00
nickysn
3d89d72621 * fixed 64-bit AND/OR/XOR in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@45005 -
 2020-04-22 21:58:43 +00:00
nickysn
e7f707cd78 + fixed 64-bit OP_NEG in a_op_reg_reg_internal 
git-svn-id: branches/z80@45004 -
 2020-04-22 21:48:42 +00:00
nickysn
ccd23d288d * handle same size, but different sign conversions properly in tcgz80.a_load_reg_ref,.a_load_ref_reg,.a_load_reg_reg 
git-svn-id: branches/z80@45003 -
 2020-04-22 21:42:00 +00:00
nickysn
4d875acdf1 + support OS_32 and OS_S32 in tcgz80.a_load_ref_cgpara 
git-svn-id: branches/z80@45002 -
 2020-04-22 21:09:03 +00:00
nickysn
0b3b8401df + implemented tcgz80.a_jmp_cond 
git-svn-id: branches/z80@44997 -
 2020-04-22 16:10:23 +00:00
nickysn
39574ac70e + implemented tz80notnode.second_boolean 
git-svn-id: branches/z80@44994 -
 2020-04-22 03:20:49 +00:00
nickysn
a3ae55081a + also handle LOC_FLAGS in tz80notnode.second_boolean 
git-svn-id: branches/z80@44993 -
 2020-04-22 03:03:11 +00:00
nickysn
bdd7cfb644 + handle LOC_JUMP in tz80notnode.second_boolean 
git-svn-id: branches/z80@44992 -
 2020-04-22 02:59:14 +00:00
nickysn
63e6c8fcf1 + override the NOT node for the Z80 (not yet implemented) 
git-svn-id: branches/z80@44991 -
 2020-04-22 02:56:51 +00:00
nickysn
242b67c50a + always use a mul helper on the Z80 
git-svn-id: branches/z80@44989 -
 2020-04-22 02:39:26 +00:00
nickysn
b741ed63b0 - commented out internal error in trgcpu.do_spill_read and trgcpu.do_spill_written 
git-svn-id: branches/z80@44988 -
 2020-04-22 02:31:21 +00:00
nickysn
9ad3de966f + handle IX and IY-based references in tcgz80.normalize_ref 
git-svn-id: branches/z80@44987 -
 2020-04-22 02:27:07 +00:00
nickysn
fe8b50fed3 * fix for Z80 pointer comparisons 
git-svn-id: branches/z80@44986 -
 2020-04-22 01:45:10 +00:00
nickysn
22d60361a8 * fixed broken code generation for unequaln in TZ80AddNode.second_cmp16_32_64bit 
git-svn-id: branches/z80@44985 -
 2020-04-22 01:30:13 +00:00
nickysn
8a3847e1b2 * use cg.a_jmp_flags in TZ80AddNode.second_cmp 
git-svn-id: branches/z80@44984 -
 2020-04-22 01:20:54 +00:00
nickysn
fec0f346f1 + partially implemented tcgz80.a_cmp_const_reg_label: all 8-bit comparison ops are implemented, and 
also OP_EQ, OP_NE for 16-bit and 32-bit operands

git-svn-id: branches/z80@44983 -
 2020-04-22 01:18:02 +00:00