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02c3f328a2
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26 Commits

Author SHA1 Message Date
Jeppe Johansen
02c3f328a2 - RISC-V: Share optimizations between 32 and 64-bit. 
git-svn-id: trunk@43934 -
 2020-01-13 22:49:23 +00:00
svenbarth
f59eae4f81 * correctly handle local reference in the RISC V assembler readers (both 32 and 64 bit) 
git-svn-id: trunk@43790 -
 2019-12-25 15:23:28 +00:00
Jonas Maebe
1e3f72403e * renamed getintparaloc to getcgtempparaloc 
o it can be used for more than integer parameters

git-svn-id: trunk@43781 -
 2019-12-24 22:12:25 +00:00
pierre
fb33da5f41 Change parameter type to tcgint for is_imm12 and is_lui_imm functions to avoid range check errors 
git-svn-id: trunk@43609 -
 2019-11-29 10:31:31 +00:00
pierre
7405ae2758 Fix trv32notnode, by using same code as for riscv64 CPU 
git-svn-id: trunk@43607 -
 2019-11-28 22:34:04 +00:00
pierre
a61a0cce4c Use same entered_paren local variable as 64-bit counterpart and fix register names 
git-svn-id: trunk@43522 -
 2019-11-20 22:44:30 +00:00
florian
e1e8986462 * patch by J. Gareth Moreton, issue #36271, part 3: support for the other architectures 
git-svn-id: trunk@43441 -
 2019-11-10 16:11:40 +00:00
pierre
2d20151446 Change parent class of trv32aatreader to trvattreader 
git-svn-id: trunk@43309 -
 2019-10-24 15:28:47 +00:00
florian
69786ffe73 somehow committing went wrong, second part of last commit: 
+ AArch64: support for vX.8b/vX.16b register names
+ support for more than 256 registers in the register dat files
- removed totherregisterset
+ AArch64: use vmov to load immediates if possible
+ AArch64: use eor to clear mm registers

git-svn-id: trunk@42917 -
 2019-09-03 21:07:33 +00:00
Jeppe Johansen
a1a17447ff - Fix bug in 64bit softfloat double negation. 
- Clean up handling of CPU/FPU type handling in RISCV.
- Do more fixes to get RISCV32 working.
- Fix most soft multiplication handling for generic RISCV code. Still missing a few.
- Add RISCV embedded targets.

git-svn-id: trunk@42335 -
 2019-07-07 11:32:27 +00:00
pierre
828a248287 Systematically include fpcdefs.inc at sart of all units used by compiler 
git-svn-id: trunk@42322 -
 2019-07-03 13:35:05 +00:00
Jonas Maebe
1b6425176b * synchronised with trunk till r42049 
git-svn-id: branches/debug_eh@42050 -
 2019-05-12 18:44:05 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 
be introduced by the next commit

git-svn-id: trunk@42046 -
 2019-05-12 14:29:03 +00:00
Jonas Maebe
a7bd37d17a * synchronised with trunk till r40776 
git-svn-id: branches/debug_eh@41867 -
 2019-04-13 15:16:09 +00:00
Károly Balogh
5358851f84 * clean up some things regarding explicit paraloc handling. this should fix m68k-amiga and powerpc-morphos builds after r41716 
git-svn-id: trunk@41730 -
 2019-03-18 01:19:18 +00:00
Jonas Maebe
ac883969a9 * synchronised with trunk till r41423 
git-svn-id: branches/debug_eh@41424 -
 2019-02-23 17:08:03 +00:00
Jonas Maebe
8b9e90dc7a * keep track of whether a routine has a C-style variadic parameter in the 
procoptions even when it's through an array-of-const parameter
  * always call create_varargs_paraloc_info() instead of create_paraloc_info()
    in the former case, even when no varargs parameters are specified (because
    on some platforms even some non-variadic parameters need to be passed
    differently, such as on ARM with gnueabihf)

git-svn-id: trunk@41420 -
 2019-02-23 15:42:45 +00:00
Jonas Maebe
bfc7c58a69 * synchronised with trunk till r40348 
git-svn-id: branches/debug_eh@40349 -
 2018-11-18 12:01:50 +00:00
pierre
53a27fe7b3 Disable range check in m68k:tiscv32 and riscv64 cgcpu units 
git-svn-id: trunk@40319 -
 2018-11-15 16:58:40 +00:00
florian
9b0ff05ee8 - get rid of MaxOps, it is redundant with max_operands 
* MatchOpType with three operands is only available of max_operands>2

git-svn-id: trunk@40190 -
 2018-11-02 21:32:29 +00:00
Jonas Maebe
8555ec1438 + fpc_eh_return_data_regno() intrinsic to get the return register numbers 
for the Dwarf EH exception handler result

git-svn-id: branches/debug_eh@40070 -
 2018-10-28 18:16:38 +00:00
pierre
92acd38f40 Fix for bug report #34380 
git-svn-id: trunk@39986 -
 2018-10-18 20:21:54 +00:00
pierre
10f72ba2c8 Add missing TFenceFlags and TRoundingMode for riscv32 
git-svn-id: trunk@39818 -
 2018-09-26 21:56:03 +00:00
florian
44150f43ac * RISC-V 32 compilation fixed 
+ lazarus project file for the compiler added

git-svn-id: branches/laksen/riscv_new@39511 -
 2018-07-26 19:18:47 +00:00
Jeppe Johansen
6352328f3a Update packages with information about RiscV. 
Fix g_external_wrapper, since it uses a register.
Fixed calling of gas.
Ported cprt0.

git-svn-id: branches/laksen/riscv_new@39475 -
 2018-07-20 10:40:28 +00:00
Jeppe Johansen
ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 
git-svn-id: branches/laksen/riscv_new@39474 -
 2018-07-20 08:21:15 +00:00