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143 Commits

Author SHA1 Message Date
yury
4cabbe0e39 * Fixed compiler cycling with enabled range and overflow checking. 
git-svn-id: trunk@11489 -
 2008-07-29 21:11:03 +00:00
florian
fe7cba52dc + support of inlined ror/rol on arm 
git-svn-id: trunk@11473 -
 2008-07-28 15:48:38 +00:00
florian
1afb1aa9cc + ror/rol functions 
+ internal compiler support for ror/rol on i386

git-svn-id: trunk@11466 -
 2008-07-27 17:12:32 +00:00
yury
a6eb251cee * Define dummy tcgarm.g_stackpointer_alloc to fix abstract warning. 
* Suppressed unreachable code warnings.
* Now ARM compiler compiles without warnings and notes.

git-svn-id: trunk@11456 -
 2008-07-23 13:22:36 +00:00
yury
a039dd6942 * Fixed warnings about hiding inherited method. 
git-svn-id: trunk@11449 -
 2008-07-23 11:51:19 +00:00
yury
6c6bf452ca * Fixed level 2 comment warnings. 
git-svn-id: trunk@11441 -
 2008-07-23 10:08:48 +00:00
florian
67ef9f20ae * test for previous commit 
* fixed wrapper generation for bigger offsets as well

git-svn-id: trunk@11059 -
 2008-05-23 16:16:34 +00:00
florian
ea46cb4218 * take care of the maximum constant size when creating interface wrappers, resolves #10831 
git-svn-id: trunk@11058 -
 2008-05-23 16:02:17 +00:00
yury
60ecb64346 * Fixed loading of single floating point values from memory to register for ARM hardfloat. 
git-svn-id: trunk@10826 -
 2008-04-27 20:47:52 +00:00
yury
b9431c876e * More complete fix for bug #10515. Thanks to Jonas for suggestion. 
* Fixed warnings in tcnvint6.pp

git-svn-id: trunk@10765 -
 2008-04-23 08:22:27 +00:00
yury
88597d23c5 * Fixed tcgarm.a_load_ref_reg to load word values from location with alignment 2 using unaligned load. 
git-svn-id: trunk@10754 -
 2008-04-22 08:46:19 +00:00
yury
9222540e84 * Small optimization. 
git-svn-id: trunk@10692 -
 2008-04-18 11:46:39 +00:00
yury
95ea5d87dd * Fixed int to int conversion in ARM code generator. 
+ Added new test to detect more bugs in int to int conversion.

git-svn-id: trunk@10691 -
 2008-04-18 11:31:12 +00:00
yury
ec943198fd * Properly fill treference.alignment when variable is loaded by tcgloadnode. It allows code generator to insert unaligned handling if needed. 
* Improved generic a_load_ref_reg_unaligned if ref alignment is 2.
* Improved unaligned load/store of register for ARM.
* It fixes passing records by value on ARM.
+ New test.

git-svn-id: trunk@10681 -
 2008-04-16 23:01:20 +00:00
yury
cf235145cb * Fixed a_load_reg_reg for arm. 
* Fixed sign/zero-extension in second_int_to_bool for all CPUs. x86 and pppc were not affected by this bug, but I fixed it for all CPUs for consistency.
* cg/tcnvint1 is passed on arm now.

git-svn-id: trunk@10669 -
 2008-04-15 20:44:27 +00:00
micha
6910b0ed40 * fix arm(eb) load/store of smaller than register sizes 
git-svn-id: trunk@10500 -
 2008-03-17 21:27:44 +00:00
Jonas Maebe
8349cde7db * changed byte/word/longbool to be Delphi-compatible (+ similar changes 
for qwordbool) + test:
    o assigning true to such a variable now sets them to $ff/$ffff/$ffffffff
    o these types are now all signed
    o converting an integer type to a byte/word/long/qwordbool using an
      explicit type cast keeps the integer's original value stored in the
      bool, instead of forcing it to ord(true)/ord(false)
    (mantis #10233 and #10613, implemented for all architectures, testsuite
     tested for ppc32, sparc and x86)
  * fixed some places where the rtl depended on longbool(true) having the
    value 1
  * extended several boolean tests (and adapted some to no longer assume
    that byte/word/long/qwordbool(true)=1)
  + support for converting to qwordbool in second_int_to_bool for x86, ppc
    and sparc

git-svn-id: trunk@9898 -
 2008-01-24 21:30:55 +00:00
florian
1e618b499d * fixes unaligned load_ref_reg on little endian arm 
git-svn-id: trunk@8972 -
 2007-10-28 15:30:50 +00:00
florian
00d6a03b2c + default code now preserves mm registers 
* save|restore_standard_registers => save|restore_registers

git-svn-id: trunk@8954 -
 2007-10-27 12:02:28 +00:00
micha
bae0251549 * fix big endian arm loading (fixes issue #8752) 
git-svn-id: trunk@8862 -
 2007-10-20 14:31:08 +00:00
peter
9f0ca44c94 * new tf_smartlink_library flag 
* use create_smartlink[_sections|_library] to check what to 
    do for smartlinking

git-svn-id: trunk@8715 -
 2007-10-01 16:55:08 +00:00
florian
b984b2227f * improved constant loading for arm 
git-svn-id: trunk@8429 -
 2007-09-11 19:28:48 +00:00
yury
bd0cafd545 * fixed ARM stackframe optimization when float registers are used. 
git-svn-id: trunk@8032 -
 2007-07-12 21:55:34 +00:00
florian
eb8b2fb138 * be more carefull with unaligned load optimization 
git-svn-id: trunk@6356 -
 2007-02-07 17:43:56 +00:00
florian
35b9bfc83e * several range check errors fixed 
git-svn-id: trunk@6324 -
 2007-02-03 19:36:06 +00:00
florian
01b23ca896 * improved last commit 
git-svn-id: trunk@6309 -
 2007-02-02 22:47:29 +00:00
florian
d0b34fef46 * safe an loadaddr for simple references when generating unaligned accesses 
git-svn-id: trunk@6308 -
 2007-02-02 22:43:30 +00:00
florian
c16c124562 * handle pc relative offsets in ldf/stf correctly 
git-svn-id: trunk@6115 -
 2007-01-21 22:55:12 +00:00
Jonas Maebe
e815b923d5 * a_loadfpu_* gets two size parameters: fromsize and tosize 
* fixed downsizing the precision of floating point values
  * floating point constants are now treated using only the minimal
    precision required (e.g. 2.0 is now a single, 1.1 extended etc)
    (Delphi compatible)

git-svn-id: trunk@5927 -
 2007-01-12 18:33:51 +00:00
yury
2a274aa510 * fixed tbs/tb0350.pp. 
* removed unused local variables.

git-svn-id: trunk@5667 -
 2006-12-21 21:18:38 +00:00
yury
c427fcf902 * fixed register to register conversion for ARM. 
git-svn-id: trunk@5537 -
 2006-12-03 22:01:33 +00:00
yury
d4335749ec * reverted r5481. That order of instructions can be executed more effectively on newer ARM CPUs. 
git-svn-id: trunk@5484 -
 2006-11-26 11:42:29 +00:00
florian
01a20b25a2 * don't reuse registers 
git-svn-id: trunk@5483 -
 2006-11-26 11:11:14 +00:00
yury
35b1014207 * more usual order of instructions. 
git-svn-id: trunk@5481 -
 2006-11-26 10:06:12 +00:00
yury
135c0ecfb7 * fixed passing float constants as part of "array of const" parameter for ARM. 
git-svn-id: trunk@5403 -
 2006-11-16 17:01:17 +00:00
florian
3f77637b56 * set is_jmp flag correctly 
git-svn-id: trunk@5399 -
 2006-11-16 09:43:58 +00:00
yury
8abe2d365e * Implemented stackframe optimization for ARM CPU. 
git-svn-id: trunk@5374 -
 2006-11-14 16:18:49 +00:00
peter
658c46b903 * remove tdictionary and tindexarray 
* symtables based on TFPHashObjectList and TFPObjectList
  * rename torddef.typ to torddef.ordtype
  * rename tfloatdef.typ to tfloatdef.floattype
  * rename tdef.deftype to tdef.typ
  * remove obsolete browser code, browcol is kept so the ide
    can still be compiled

git-svn-id: trunk@5192 -
 2006-11-03 00:30:30 +00:00
florian
85d63d9fa9 * settings refactored 
git-svn-id: trunk@5094 -
 2006-10-30 18:02:58 +00:00
florian
922de0bc8d * fixed wrong load_ref_ref 
git-svn-id: trunk@5092 -
 2006-10-30 11:48:37 +00:00
florian
67ba76f090 * several arm fixes 
git-svn-id: trunk@4742 -
 2006-09-27 21:05:05 +00:00
florian
e08bf34689 * stack page initialization disabled, not necessary according to Yury Sidorov 
git-svn-id: trunk@4539 -
 2006-09-02 20:43:59 +00:00
florian
7145eeb4b9 * bugs in wince stack initialization fixed 
git-svn-id: trunk@4517 -
 2006-08-29 19:32:40 +00:00
florian
e08a24562c * experimental wince stack initialization fix 
git-svn-id: trunk@4516 -
 2006-08-29 16:01:52 +00:00
yury
0018d7b920 * final fix for overflow checking for ARM. 
git-svn-id: trunk@4103 -
 2006-07-06 18:54:19 +00:00
yury
0c396ad3da * proper fix for rev. 4097. 
git-svn-id: trunk@4099 -
 2006-07-06 12:23:29 +00:00
yury
76921030e9 * fixed bug #6079 for ARM CPU. 
git-svn-id: trunk@4097 -
 2006-07-06 10:27:23 +00:00
florian
bbc42e8503 * made ie unique 
git-svn-id: trunk@3737 -
 2006-05-29 19:50:12 +00:00
florian
30e7d87c11 * fixed loading of floating point constants 
git-svn-id: trunk@3667 -
 2006-05-25 09:57:07 +00:00
florian
2ddd617971 * fixed stm/ldm for usage with large temp. areas 
git-svn-id: trunk@3633 -
 2006-05-22 21:00:55 +00:00