Commit Graph

20614 Commits

Author SHA1 Message Date
nickysn
353efcb163 * fixed rdi register name in error message
git-svn-id: trunk@37474 -
2017-10-16 16:14:18 +00:00
nickysn
cece021bd1 + check whether the address sizes match for x86 string instructions with two
memory operands, when using the at&t syntax inline assembler

git-svn-id: trunk@37473 -
2017-10-16 16:01:38 +00:00
nickysn
4cb1a96ec1 * use get_ref_address_size in the nasm writer, when handling the parameterized
string instructions

git-svn-id: trunk@37471 -
2017-10-16 14:21:03 +00:00
nickysn
6f2e64ff90 + added function get_ref_address_size
git-svn-id: trunk@37470 -
2017-10-16 14:13:03 +00:00
nickysn
b0653a6313 + added functions is_32_bit_ref and is_64_bit_ref, similar to is_16_bit_ref
* taicpu.needaddrprefix now uses is_32_bit_ref on x86_64
* is_16/32/64_bit_ref made part of the aasmcpu unit interface, so they can be
  used elsewhere (e.g. in the inline assembler readers)

git-svn-id: trunk@37469 -
2017-10-16 14:05:06 +00:00
nickysn
2b6e5d817e * changed the parameter of is_16_bit_ref to be a treference, instead of toper
git-svn-id: trunk@37463 -
2017-10-16 00:30:26 +00:00
pierre
d18627f0af * Update all fpcsrc Makefile's using latest fpcmake version 2017-09-21 rev 37286
git-svn-id: trunk@37462 -
2017-10-16 00:27:27 +00:00
nickysn
acfa199b09 * in the nasm writer, only output a segment prefix for the [si] operand, in
case there's a segment operand, different that DS (the default source
  segment) for parameterized x86 string instructions

git-svn-id: trunk@37459 -
2017-10-14 16:58:15 +00:00
nickysn
a8232ac477 + added warning if source or destination for x86 string instructions isn't
specified to be (%esi) or (%edi), when using at&t syntax assembler (this is
  not considered an error by intel syntax assemblers, so we're not adding a
  warning there, for now)

git-svn-id: trunk@37458 -
2017-10-14 15:27:00 +00:00
nickysn
dd9b5eb2aa + added the 'Cannot override ES' message in the at&t assembler reader as well
git-svn-id: trunk@37456 -
2017-10-14 00:48:46 +00:00
nickysn
1ee36b5b9b + added error message in the intel assembler reader, when an attempt is made to
override the ES segment in an x86 string instruction (because it cannot be
  overriden)

git-svn-id: trunk@37454 -
2017-10-13 14:56:38 +00:00
nickysn
baf492c7a5 + another helper function: x86_parameterized_string_op_param_count
* when generating x86 code for parameterized string instructions with the
  internal object writer, don't rely on the destination operand being [(r/e)di]
  when determining the segment prefix, because when using intel syntax, source
  and destination can be anything (only the operand size, the address size and
  the source segment is taken into account)

git-svn-id: trunk@37452 -
2017-10-12 16:07:15 +00:00
nickysn
4c75b15afe * shortened the names of the is_x86_string_instruction_op,
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op by removing 'instruction' from
  their names

git-svn-id: trunk@37451 -
2017-10-12 15:20:22 +00:00
nickysn
e3ca2a3043 + added helper functions get_x86_string_op_si_param and get_x86_string_op_di_param
* use get_x86_string_op_si_param in the nasm writer

git-svn-id: trunk@37450 -
2017-10-12 15:12:40 +00:00
nickysn
5a5cd65559 + added helper functions x86_param2paramless_string_op and
get_x86_string_op_size
* refactored the AT&T inline asm handling of x86 parameterized string ops, so it
  uses the new helper functions

git-svn-id: trunk@37449 -
2017-10-12 14:25:32 +00:00
nickysn
2f28768d2d * simplify some code, by using is_x86_parameterized_string_instruction_op
git-svn-id: trunk@37448 -
2017-10-12 13:26:07 +00:00
nickysn
98c4986b6d + added x86 helper functions is_x86_string_instruction_op,
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op

git-svn-id: trunk@37447 -
2017-10-12 13:18:38 +00:00
nickysn
0fb79946a5 + added support for the parameterized versions of the x86 string instructions
(movs, cmps, scas, lods, stos, ins, outs) in the inline asm of the i8086, i386
  and x86_64 targets. Both intel and at&t syntax is supported.
* NEC V20/V30 instruction 'ins' (available only on the i8086 target, because it
  is incompatible with 386+ instructions) renamed 'nec_ins', to avoid conflict
  with the 186+ 'ins' instruction.

git-svn-id: trunk@37446 -
2017-10-12 00:07:02 +00:00
svenbarth
fcc1ce7a08 * fix for Mantis #30344: applied patch by Mario Ray Mahardhika to add new command line option -Sj[-|+] to control writeable typed constants (with a small adjustment to the help text)
+ added test

git-svn-id: trunk@37437 -
2017-10-09 19:19:23 +00:00
nickysn
d96558cd64 * fixed bug in assembling some 32-bit instructions on the i8086 target (e.g.
mov dword ptr [something], ebx)

git-svn-id: trunk@37430 -
2017-10-08 11:10:42 +00:00
svenbarth
f6a867ef04 * move handling of Concat to tinlinenode so that it can be easily extended for dynamic arrays
+ added test

git-svn-id: trunk@37429 -
2017-10-08 10:39:34 +00:00
svenbarth
c01b36a2fa * the checks for no parameters are not needed for Insert() and Delete() as they take care of that themselves with an overload listing
git-svn-id: trunk@37428 -
2017-10-08 10:37:30 +00:00
florian
3d3298f64d * write absolute references correctly on avr, resolves #32040
git-svn-id: trunk@37419 -
2017-10-07 21:09:20 +00:00
florian
4cf2a2672a changes to fix #32043
* changed most of the variables in the assembler readers used to store constants from aint to tcgint 
  as aint has only the size of the accumular while some CPUs (AVR) allow larger constants in instructions
+ allow access to absolute symbols with address type in inline assembler
* allow absolute addresses in avr inline assembler
+ tests

git-svn-id: trunk@37411 -
2017-10-06 21:07:19 +00:00
nickysn
92a52a9f4d + implemented support for instructions with non-native address size on i8086
(16-bit and 32-bit), i386 (16-bit and 32-bit) and x86_64 (32-bit and 64-bit).
  Known bug: 32-bit addresses with an offset have their offset truncated to its
  low 16-bits on i8086

git-svn-id: trunk@37409 -
2017-10-06 15:27:14 +00:00
nickysn
8589b946fc * different versions (behind cpu specific ifdefs) of process_ea_ref renamed
process_ea_ref_64_32, process_ea_ref_32 and process_ea_ref_16, indicating
  the address size they support; this is done, so that in the future, we can
  mix them all on the same x86 architecture and support multiple address sizes

git-svn-id: trunk@37407 -
2017-10-05 22:15:26 +00:00
nickysn
31c9214884 * replaced R_SUBADDR with the appropriate size (R_SUBW, R_SUBD or R_SUBQ) in
the cpu specific process_ea_ref function

git-svn-id: trunk@37400 -
2017-10-05 20:39:32 +00:00
florian
cc44328109 * correctly calc case label distance after r36362, resolves #32115 and #32311
git-svn-id: trunk@37390 -
2017-10-03 20:36:09 +00:00
florian
99a3855e6b * restored old default values for MajorOperatingSystemVersion, MajorSubsystemVersion and MinorSubsystemVersion, resolves issue #32492
git-svn-id: trunk@37381 -
2017-10-01 21:02:37 +00:00
florian
7817102727 * patch by Christo Crause to implement 8 bit multiplications for "mul-less" avr types, resolves issue #31925
git-svn-id: trunk@37380 -
2017-10-01 20:34:44 +00:00
florian
c0feaf1f1e + allow absolute to absolute symbols, resolves issue #32474
git-svn-id: trunk@37379 -
2017-10-01 19:54:44 +00:00
florian
5b755661d8 + patch by Simon Ameis: adds all the STM32F091* microcontroller units to the list of supported ARM MCUs, resolves issue #32484
git-svn-id: trunk@37378 -
2017-10-01 18:59:01 +00:00
florian
ce7487b7de o patch by J. Gareth "Kit" Moreton, resolves partially issue #32037
o improves readibility of TX86AsmOptimizer.OptPass1MOV and fixes some spelling mistakes
  + Optimization MovAnd2Mov 2
  + extended Optimization MovTestJxx2TestMov and MovTestJxx2ovTestJxx to take care of and as well
  + Peephole Optimization: movq x,%reg -> movd x,%reg

git-svn-id: trunk@37377 -
2017-10-01 18:40:11 +00:00
florian
198c53a908 o patch by J. Gareth "Kit" Moreton, resolves partially issue #32037
* generate instructions with shorter imm on x86-64 if possible

git-svn-id: trunk@37376 -
2017-10-01 18:40:09 +00:00
florian
75e03a7e62 * avoid unneeded the generation of un-needed shift instructions thlcgobj.in a_load_subsetreg_reg
git-svn-id: trunk@37374 -
2017-10-01 16:13:22 +00:00
florian
6f338bb4b5 + tcgsubscriptnode.pass_generate_code makes use of a_loadmm_reg_intreg to avoid location_force_mem calls
git-svn-id: trunk@37373 -
2017-10-01 16:13:20 +00:00
florian
f0c237a159 + let a_load_loc_reg handle also LOC_*MMREGISTER as we have loadmm_*intreg*
git-svn-id: trunk@37372 -
2017-10-01 16:13:18 +00:00
florian
15b617546e + call TX86AsmOptimizer.OptPass1VOP for logical operations as well
git-svn-id: trunk@37367 -
2017-10-01 14:40:21 +00:00
svenbarth
9619576515 + add support for $SetPE{OS,SubSys,User}Version directives; Delphi compatible; Note: $SetPEUserVersion takes precedence to $Version
+ added test

git-svn-id: trunk@37364 -
2017-09-30 13:55:29 +00:00
svenbarth
5c447cba50 * fix for Mantis #32476: use the correct string to check i2
git-svn-id: trunk@37361 -
2017-09-30 11:22:02 +00:00
pierre
8b63f97173 Call ungetregister for NR_D2 at m68k-palmos syscall exit
git-svn-id: trunk@37351 -
2017-09-28 14:55:41 +00:00
svenbarth
b3ee9339b8 * also report the dynamic array "overloads" for the Insert() intrinsics
git-svn-id: trunk@37343 -
2017-09-27 21:18:04 +00:00
svenbarth
c5b33f51f9 * fix for Mantis #32412: correctly handle an incorrect parameter count for Delete() and Insert() intrinsics
+ added tests

git-svn-id: trunk@37342 -
2017-09-27 21:15:00 +00:00
svenbarth
a1c910d892 * fix for Mantis #32108: ensure that types are registered once there is no more specialization is going on
git-svn-id: trunk@37341 -
2017-09-27 20:47:16 +00:00
svenbarth
b765d661ce * when registering a def also register the syms and defs of its symtables
git-svn-id: trunk@37340 -
2017-09-27 20:34:38 +00:00
svenbarth
b322339758 + extend tstoredsymtable with method register_children to register all its symbols and defs
git-svn-id: trunk@37339 -
2017-09-27 20:27:05 +00:00
svenbarth
a52b675779 * fix that *annoying* search & replace remnant of incorrect casing
git-svn-id: trunk@37334 -
2017-09-27 19:42:47 +00:00
florian
1c69ae6a15 handle correctly "reg+const" operands in avr assembler, fixes issue #32016
git-svn-id: trunk@37328 -
2017-09-26 20:14:41 +00:00
nickysn
b3f7bce3a6 * check for CPUX86_HAS_SSE2 instead of CPUX86_HAS_SSEUNIT in Tcgx86.g_concatcopy
git-svn-id: trunk@37327 -
2017-09-26 16:05:23 +00:00
nickysn
aec03309ef + added CPUX86_HAS_SSE2 to x86 tcpuflags
git-svn-id: trunk@37326 -
2017-09-26 16:02:56 +00:00