Commit Graph

270 Commits

Author SHA1 Message Date
florian
3d3298f64d * write absolute references correctly on avr, resolves #32040
git-svn-id: trunk@37419 -
2017-10-07 21:09:20 +00:00
florian
4cf2a2672a changes to fix #32043
* changed most of the variables in the assembler readers used to store constants from aint to tcgint 
  as aint has only the size of the accumular while some CPUs (AVR) allow larger constants in instructions
+ allow access to absolute symbols with address type in inline assembler
* allow absolute addresses in avr inline assembler
+ tests

git-svn-id: trunk@37411 -
2017-10-06 21:07:19 +00:00
florian
7817102727 * patch by Christo Crause to implement 8 bit multiplications for "mul-less" avr types, resolves issue #31925
git-svn-id: trunk@37380 -
2017-10-01 20:34:44 +00:00
florian
1c69ae6a15 handle correctly "reg+const" operands in avr assembler, fixes issue #32016
git-svn-id: trunk@37328 -
2017-09-26 20:14:41 +00:00
florian
9ef646e3c5 * fix avr for new GetNextReg behaviour
* some wrong GetNextReg usage in the avr code generator fixed

git-svn-id: trunk@37316 -
2017-09-24 20:51:05 +00:00
nickysn
db09759763 * also integrated the getnextreg() implementation for 8-bit and 16-bit alus from
the avr and i8086 code generators into the base tcg class

git-svn-id: trunk@37182 -
2017-09-11 15:47:39 +00:00
nickysn
cf28b202eb * integrated the getintregister() implementation for 8-bit and 16-bit alus from
the avr and i8086 code generators into the base tcg class (so it can be reused
  by other 8-bit and 16-bit targets)

git-svn-id: trunk@37181 -
2017-09-11 15:23:59 +00:00
nickysn
ddba821561 * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
from cpubase unit to a method in the tcg class. The reason for doing that is
  that this is now a standard part of the 16-bit and 8-bit code generators and
  moving to the tcg class allows doing extra checks (not done yet, but for
  example, in the future, we can keep track of whether there was an extra
  register allocated with getintregister and halt with an internalerror in case
  GetNextReg() is called for registers, which weren't allocated as a part of a
  sequence, therefore catching a certain class of 8-bit and 16-bit code
  generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
  anything. It might be added to the tcg class, in case it's ever needed, but
  for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.

git-svn-id: trunk@37180 -
2017-09-11 14:53:06 +00:00
nickysn
3c96090d3c + optimized avr code generation for shr by shiftcount=size*8-1 and sar by
shiftcount>=size*8-1. This is commonly used by code, that extracts the sign
  bit and improves code generation for signed division by power-of-2 as well.
  This also fixes building avr-embedded (mantis #32241), which was caused by an
  infinite loop in the register allocator, when regvars are enabled, due to too
  much register pressure, when building charset.pp after r36842.

git-svn-id: trunk@36867 -
2017-08-09 15:53:06 +00:00
nickysn
1476b5168d + added F_PL and F_MI to TResFlags for avr. This allows generating the BRPL and
BRMI instructions via a_jmp_cond

git-svn-id: trunk@36866 -
2017-08-09 15:14:33 +00:00
svenbarth
e76b1b2959 * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler)
git-svn-id: trunk@36809 -
2017-07-28 15:54:03 +00:00
florian
a2e442e111 * keep the names of X, Y and Z in assembler files, fixes issue #32150
git-svn-id: trunk@36776 -
2017-07-23 19:24:45 +00:00
nickysn
5138d4e067 * fixed avr multiplication after r36344
git-svn-id: trunk@36369 -
2017-05-29 12:42:02 +00:00
svenbarth
7c9aeda656 * rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR
git-svn-id: trunk@36310 -
2017-05-23 19:58:39 +00:00
svenbarth
fab6f70de8 * rework AVR's InsertInitFinalTable to make use of get_init_final_list instead of iterating the init/fini functions itself
git-svn-id: trunk@36309 -
2017-05-23 19:46:07 +00:00
Jonas Maebe
61af0fb72d * only take into account the location of the parameter at the callee side to
determine whether it's in a register if it's a pure assembler routine
  * you can't "index" implicit pointers either using their fields

git-svn-id: trunk@36287 -
2017-05-21 20:17:11 +00:00
florian
4a43d992f5 * unified usage of MatchOpType
* fixed generic MatchOpType

git-svn-id: trunk@36145 -
2017-05-07 16:18:33 +00:00
florian
39b7f1bffe * do not write assembler optimizer debug output in avr assembler files
git-svn-id: trunk@36063 -
2017-05-02 19:50:37 +00:00
Jonas Maebe
aa82e00615 * fixed check to determine whether a record parameter can be subscripted
directly in inline assembly: that's only possible if it's a register
    parameter where the address of the record was passed (rather than the
    record itself), or if a parameter has been explicitly typecasted in
    Intel-style assembly using ".size"

git-svn-id: trunk@35959 -
2017-04-26 19:43:35 +00:00
florian
73c46a5988 - removed unused constants
git-svn-id: trunk@35664 -
2017-03-26 13:06:34 +00:00
Jonas Maebe
015f034904 * reverted r35424, wasn't ready for commit yet
git-svn-id: trunk@35426 -
2017-02-11 21:21:44 +00:00
Jonas Maebe
4d9617da97 * fixed check to determine whether a record parameter can be subscripted
directly in inline assembly: that's only possible if it's a register
    parameter where the address of the record was passed (rather than the
    record itself)

git-svn-id: trunk@35424 -
2017-02-11 19:57:08 +00:00
Jonas Maebe
880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
inherit from it for LLVM without a thousand ifdefs

git-svn-id: trunk@35141 -
2016-12-16 22:41:21 +00:00
florian
0954e09834 * correctly handle 16 bit signed operations on AVRs without mul instruction, resolves #31036
git-svn-id: trunk@35031 -
2016-12-01 21:01:47 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
2016-11-27 18:17:37 +00:00
florian
da7e1b3769 + tavraddrnode.pass_generate_code, avoiding unneeded moves
git-svn-id: trunk@34973 -
2016-11-26 19:31:33 +00:00
florian
8e7101a65a * proper naming of the optimziation in the DebugMsg
git-svn-id: trunk@34957 -
2016-11-24 18:28:48 +00:00
florian
e33b2920dc + CallReg2Jmp optimization
git-svn-id: trunk@34937 -
2016-11-20 18:00:27 +00:00
florian
3eef641833 * convert jmp into rjmp only of the target is not a function
git-svn-id: trunk@34936 -
2016-11-20 18:00:01 +00:00
florian
0882c13cb7 * do not move dest to a new register if not needed in tcgavr.g_concatcopy
git-svn-id: trunk@34935 -
2016-11-20 16:07:53 +00:00
florian
e49a826837 + PushPushPopPop2MovMov optimization
git-svn-id: trunk@34934 -
2016-11-20 16:03:49 +00:00
florian
0520d246d0 * changed LdiCp2Cpi into LdiMov/Cp2Ldi/Cpi and improved it
git-svn-id: trunk@34920 -
2016-11-19 19:22:47 +00:00
florian
c86bac021b + xch instruction for avr
git-svn-id: trunk@34919 -
2016-11-19 19:21:09 +00:00
Jonas Maebe
86876ed114 * MaybeRecordOffset: initialise "mangledname" variable
git-svn-id: trunk@34857 -
2016-11-09 19:51:36 +00:00
Jonas Maebe
74a49b5f91 * restructured the the TExternalAssembler constructors so that the
hack for the Jasmin descendent is no longer needed

git-svn-id: trunk@34852 -
2016-11-09 19:51:20 +00:00
pierre
89c1b68b14 * Delete regvars unit.
This unit was empty unless OLDREGVARS macro was set,
    but this does not compile and no change has been made since 2011.

  * Remove regvars from all _USES clauses.

git-svn-id: trunk@34808 -
2016-11-06 14:01:39 +00:00
Jonas Maebe
0afbe85aab * various memory reference alignment fixes
git-svn-id: trunk@34544 -
2016-09-20 21:43:19 +00:00
Jonas Maebe
aa1be3276f - removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
it was AT_NONE, which is invalid and should never be used
  * explicitly pass the correct value for all calls to those methods elsewhere
    in the compiler

git-svn-id: trunk@34250 -
2016-08-05 07:09:16 +00:00
Jonas Maebe
a0efde8167 * automatically generate necessary indirect symbols when a new assembler
symbol is defined
   o removed all places where AB_INDIRECT symbols were explicitly generated
   o only generate AB_INDIRECT symbols for AT_DATA on systems_indirect_var_imports
   o for some symbols an indirect symbol is always required (because they are
     dereferenced by code in RTL units) -> use new AT_DATA_FORCEINDIRECT type

git-svn-id: trunk@34165 -
2016-07-20 20:53:03 +00:00
Jonas Maebe
1cb8c0d00c * specify the def of assembler level symbols defined via
tasmdata.DefineAsmSymbol() and all routines that call it
   o will be used to automatically generate AB_INDIRECT sybols when
     necessary

git-svn-id: trunk@34164 -
2016-07-20 20:52:59 +00:00
florian
b2f15e2736 * first check for ait_instruction before checking opcode
git-svn-id: trunk@33693 -
2016-05-16 13:10:20 +00:00
florian
56b6cedcf4 * increase ram size of the avrsim controller target
git-svn-id: trunk@33066 -
2016-02-07 11:17:55 +00:00
Jonas Maebe
110a5642c0 - removed ait_weak/tai_weak, and replaced it with the previously existing
asd_weak_reference/asd_weak_definition directives

git-svn-id: trunk@32879 -
2016-01-07 22:05:38 +00:00
florian
bd20c5a66b * set a proper sram base for the avrsim controller type
git-svn-id: trunk@32647 -
2015-12-12 22:37:41 +00:00
Jeppe Johansen
159c28eca8 Fix AVR comparison with zero.
git-svn-id: trunk@32589 -
2015-12-05 15:25:33 +00:00
Jeppe Johansen
5ec4d38231 Add support for ram-less AVR chips and simultanously optimize flash/ram size the initfinal calling sequence.
git-svn-id: trunk@32448 -
2015-11-22 00:37:10 +00:00
Jeppe Johansen
baae6ec169 Fix incorrect AVR optimization.
git-svn-id: trunk@32441 -
2015-11-21 16:53:56 +00:00
Jonas Maebe
fa3b0ca312 * support marking defs created via the getreusable*() class methods as
"don't free even if not registered"; use for defs that may not be written
    to a ppu file, but that must nevertheless survive the compilation of the
    current module
  * mark all defs created for para locations as "don't free even if not
    registered", because we don't discard and recalculate all para locations
    after a module has been compiled (since that's not needed)
   o solves issues if the paralocations for a routine in the interface of
     unit A are calculated while the implementation of unit B gets
     compiled, and a new reusable type is allocated at that point which
     is not used anywhere else (after r32160)

git-svn-id: trunk@32235 -
2015-11-04 20:46:18 +00:00
Jeppe Johansen
14020b044c Fix bug in gen_load_cgpara_loc for 64bit registers on 8bit architectures.
Added a workaround in a_load_const_reg to allow compilation for AVR.

git-svn-id: trunk@32090 -
2015-10-18 11:36:58 +00:00
Jeppe Johansen
1a285a7d24 Fixed an off-by-one error in a_load_const_cgpara which caused some problems.
Added some minor CG optimizations.

git-svn-id: trunk@32088 -
2015-10-18 11:03:57 +00:00