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58,961 Commits 102 Branches 76 Tags 416 MiB
365e320119
Commit Graph

23370 Commits

Author SHA1 Message Date
nickysn
365e320119 + partial implementation of taicpu.Matches 
git-svn-id: trunk@45175 -
 2020-04-29 16:25:52 +00:00
nickysn
20e2a0efac + added Z80 register AF' 
git-svn-id: trunk@45174 -
 2020-04-29 16:00:25 +00:00
nickysn
6654faea08 + build an instruction table cache for the Z80 
git-svn-id: trunk@45173 -
 2020-04-29 14:53:21 +00:00
nickysn
f8c2d4a632 * added comment, stating that Z80 has no condition subsets 
git-svn-id: trunk@45172 -
 2020-04-29 12:19:59 +00:00
nickysn
cfb28c7654 * fixed bug, causing the global variable stacksize to be destroyed 
git-svn-id: trunk@45171 -
 2020-04-29 02:00:26 +00:00
Károly Balogh
695a260ff8 zxspectrum: added support for linking via vlink, and for pascal sysinit code. also some cleanup in the linker code 
git-svn-id: trunk@45169 -
 2020-04-29 01:32:48 +00:00
Károly Balogh
60c73dd14b z80: fix typo in the previous commit 
git-svn-id: trunk@45164 -
 2020-04-28 23:10:35 +00:00
Károly Balogh
04bd105cf5 z80: fix global symbols and section attributes in the vasm writer 
git-svn-id: trunk@45163 -
 2020-04-28 23:10:03 +00:00
florian
50c221670f * do not generate moves unncesssarily in tcgloadparentfpnode.pass_generate_code 
git-svn-id: trunk@45162 -
 2020-04-28 21:25:42 +00:00
nickysn
86e04ddd5c + enable the sdasz80 lameness check permanently, because the system unit now 
compiles, and it's important to catch other similar errors also

git-svn-id: trunk@45158 -
 2020-04-28 19:34:38 +00:00
nickysn
07a8af33b1 + z80: generate correct code in do_spill_read and do_spill_written for spilling to temp offsets outside the range -128..127 
git-svn-id: trunk@45157 -
 2020-04-28 19:31:11 +00:00
nickysn
6dbe1368ef + z80: added range checking for d in the (IX+d) and (IY+d) addressing modes in 
the sdasz80 assembler writer, because sdasz80 silently truncates d to shortint
  which produces broken code and hides bugs in the z80 code generator. The check
  is behind ifdef, because the system unit doesn't compile, when this check is
  enabled, due to bugs that were previously unnoticed. When these bugs are
  fixed, the ifdef will be removed.

git-svn-id: trunk@45156 -
 2020-04-28 18:49:50 +00:00
marcus
589b2b956f Fixed LLVM compilation after r45143 
git-svn-id: trunk@45155 -
 2020-04-28 18:41:45 +00:00
pierre
a506fe9560 Fix cross-compilation on aarch64-linux using -dFPC_SOFT_FPUX80 option 
git-svn-id: trunk@45154 -
 2020-04-28 18:35:53 +00:00
nickysn
573d69c8fe * unfortunately tf_smartlink_sections is mutually exclusive with 
tf_smartlink_library, and defining both breaks sdasz80, so put this behind
  ifdef Z80_SMARTLINK_SECTIONS

git-svn-id: trunk@45153 -
 2020-04-28 15:14:39 +00:00
Károly Balogh
23fc0fe66a z80: added quick & dirty vasm assembler support to the target 
git-svn-id: trunk@45152 -
 2020-04-28 01:23:31 +00:00
Károly Balogh
db1ef439b5 z80: sdasz80 won't do section smartlinking for us, but it's used for the zx spectrum target 
git-svn-id: trunk@45151 -
 2020-04-28 01:17:29 +00:00
nickysn
491462fd02 + added another helper for register pairs: register_in 
git-svn-id: trunk@45150 -
 2020-04-28 00:18:49 +00:00
nickysn
a5d36e1bc6 + added Z80 helper functions is_regpair and split_regpair 
git-svn-id: trunk@45149 -
 2020-04-28 00:05:53 +00:00
nickysn
69c95115f6 - removed GetHigh, GetNextReg, GetLastReg, GetOffsetReg and GetOffsetReg64 from cpubase. The methods 
in cg should be used instead, because they do better error checking on the register used.

git-svn-id: trunk@45147 -
 2020-04-27 22:03:36 +00:00
nickysn
29d681168a * merged the z80 branch 
git-svn-id: trunk@45143 -
 2020-04-27 20:07:54 +00:00
florian
a084c8829f * patch by J. Gareth Moreton: refactor RemoveCurrentP 
git-svn-id: trunk@45142 -
 2020-04-27 19:27:16 +00:00
florian
e7f7927ca9 + initialize variables, so compilation with -O3 works 
git-svn-id: trunk@45141 -
 2020-04-27 19:19:54 +00:00
nickysn
a857e60dc1 * tsystemcpu.cpu_sys_z80 renamed .cpu_z80 for consistency with the other values in the enum. 
git-svn-id: branches/z80@45140 -
 2020-04-27 15:50:29 +00:00
nickysn
9cca44d3af * tcputype.cpu_ez80 renamed .cpu_zilog_ez80 
git-svn-id: branches/z80@45139 -
 2020-04-27 15:49:14 +00:00
nickysn
784237ee33 * tcputype.cpu_z80 renamed .cpu_zilog_z80 
git-svn-id: branches/z80@45138 -
 2020-04-27 15:47:52 +00:00
nickysn
25a42c6469 * update msg 
git-svn-id: branches/z80@45132 -
 2020-04-26 22:36:51 +00:00
nickysn
6f6598712f * synchronized with trunk 
git-svn-id: branches/z80@45131 -
 2020-04-26 22:33:58 +00:00
nickysn
368f4412c4 * handle nf_swapped properly in TZ80AddNode.second_cmp16_32_64bit 
git-svn-id: branches/z80@45128 -
 2020-04-26 22:09:37 +00:00
nickysn
647725ea0c * optimizations in tcgz80.normalize_ref 
git-svn-id: branches/z80@45127 -
 2020-04-26 21:36:13 +00:00
nickysn
5a5a8602d3 * optimization in tcgz80.a_load_const_cgpara for pushing longints, where the low 16 bits are equal 
to the high 16 bits (works for e.g. 0)

git-svn-id: branches/z80@45126 -
 2020-04-26 21:12:15 +00:00
nickysn
3338603bb8 * generate better code in tcgz80.a_loadaddr_ref_reg 
git-svn-id: branches/z80@45125 -
 2020-04-26 20:58:52 +00:00
florian
db9a284d60 * simplify xtensa-linux building 
git-svn-id: trunk@45124 -
 2020-04-26 20:54:22 +00:00
nickysn
5be4ce281f * don't reorder LOC_REFERENCE parameters on the Z80 also 
git-svn-id: branches/z80@45122 -
 2020-04-26 19:49:17 +00:00
nickysn
44d95ef7c8 + generate better code in op_const_reg for OP_ADD and OP_SUB by using in certain cases A_DEC for OP_SUB 
and A_INC for OP_ADD

git-svn-id: branches/z80@45120 -
 2020-04-26 17:24:53 +00:00
florian
8ef29235c3 * Xtensa: set source_cpu_string 
git-svn-id: trunk@45117 -
 2020-04-26 17:23:24 +00:00
nickysn
7957560fba + implemented tcgz80.a_adjust_sp 
git-svn-id: branches/z80@45116 -
 2020-04-26 17:04:15 +00:00
nickysn
723faf14a9 - removed GetByteLoc, because it isn't used 
git-svn-id: branches/z80@45113 -
 2020-04-26 16:44:14 +00:00
nickysn
ff0c771e2e - removed unused local vars 
git-svn-id: branches/z80@45112 -
 2020-04-26 16:42:19 +00:00
nickysn
9b9197c06e * formatting 
git-svn-id: branches/z80@45111 -
 2020-04-26 16:42:03 +00:00
nickysn
5de66f75a0 - removed commented out code from tcgz80.a_cmp_reg_reg_label 
git-svn-id: branches/z80@45110 -
 2020-04-26 16:41:44 +00:00
nickysn
ab8f9cc707 - removed commented out code from tcgz80.done_register_allocators 
git-svn-id: branches/z80@45109 -
 2020-04-26 16:40:52 +00:00
nickysn
1713176078 - removed commented out code from tcgz80.a_load_reg_cgpara 
git-svn-id: branches/z80@45108 -
 2020-04-26 16:40:21 +00:00
nickysn
3d5452cda3 - removed commented out code from tcgz80.a_load_ref_cgpara 
git-svn-id: branches/z80@45107 -
 2020-04-26 16:39:36 +00:00
nickysn
ab6d9e9df9 - removed tcgz80.maybegetcpuregister, because it isn't used 
git-svn-id: branches/z80@45106 -
 2020-04-26 16:38:29 +00:00
nickysn
05ca71133f + implemented OP_MUL/OP_IMUL in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@45105 -
 2020-04-26 16:37:53 +00:00
nickysn
78c40a6d70 * allow setting the stack size from FPC 
git-svn-id: branches/z80@45104 -
 2020-04-26 16:04:29 +00:00
nickysn
3a80895e34 * fixed section writing with smartlinking the sdcc-sdasz80 asm writer 
git-svn-id: branches/z80@45103 -
 2020-04-26 15:35:03 +00:00
nickysn
caecdfd51d + allow setting the heap size for the ZX Spectrum target 
git-svn-id: branches/z80@45102 -
 2020-04-26 14:58:47 +00:00
nickysn
3e38e3acc5 + added system_z80_embedded to systems_embedded 
git-svn-id: branches/z80@45101 -
 2020-04-26 14:45:31 +00:00