5 Commits

Author	SHA1	Message	Date
peter	ecfbbeffc3	* renamed xNNbittype to xNNinttype ... * renamed registers32 to registersint * replace some s32bit,u32bit with torddef([su]inttype).def.typ	2004-02-03 22:32:53 +00:00
florian	c77ec09d49	* fixed code generation for math inl. nodes ... * more code generator improvements	2004-01-27 15:04:06 +00:00
florian	1779c5dd8c	* fixed symbol type writing for arm-linux ... * fixed assembler generation for abs	2004-01-20 21:02:54 +00:00
florian	a9d9a15e20	* fixed ARM for new reg. allocation scheme	2003-11-02 14:30:03 +00:00
florian	dc7d8ba847	* today's arm patches	2003-08-28 00:05:29 +00:00