is 386+ only and the internal handling was not used anyway on i8086, due to
some nested defines in systemh.inc missing on i8086.
git-svn-id: trunk@26592 -
Although basic things work (no regressions in test suite, also with TEST_OPT=-O2), there are some secondary issues/TODOs:
- Exception frame around PASCALMAIN is not properly removed in DLLs
- No stack traces yet
- Stack overallocated in finalizer procedures, their entry/exit code needs cleanup
- Signals unit is probably completely broken.
git-svn-id: trunk@26225 -
default -O1/2/3 optimization levels and supported optimization switches
(e.g. -Ooregvar is not supported for the llvm target, nor needed)
git-svn-id: branches/hlcgllvm@26055 -
o no support yet for many ait_* types, although eventually most of them
shouldn't be generated at all for the llvm target
o no support yet for calling "opt" (which optimises llvm bitcode) before
calling llc (which translates llvm bitcode into native code) -- compile
with -s and manually call "opt" with -std-compile-opts, -O1, -O2 or -O3
if you want to experiment
o override the assembler writer with the llvm one when compiling an llvm-
targeting compiler
o override the assembler file extension with .ll when compiling an llvm-
targeting compiler
git-svn-id: branches/hlcgllvm@26054 -
target is now set before the second pass of parsing the command line
arguments. Then during the second pass, it can be overriden.
git-svn-id: trunk@25607 -
Therefor the cpu type (-Cp...) "coldfire" was split up into "isaa", "isaa+", "isab" and "isac". The Linux RTL can currently compiled for "68020", "isab" and "isac". For the other three Bcc.L must be handled differently (only Bcc.B/W supported) and for "68000" also EXT.L needs to be handled differently.
fpcdefs.inc:
+ define CPUCAPABILITIES if capabilities can be set for a certain CPU type (currently ARM, AVR and M68k)
options.pas:
* check for CPUCAPABILITIES instead of specific CPUs
assemble.pas:
- the handling of the CPU type is already done in m68k/ag68kgas.pas, Tm68kGNUAssembler.MakeCmdLine (and thereby already using the gascputypestr array!)
m68k/cpuinfo.pas:
- tcputype: remove "cpu_coldfire"
+ tcputype: add "cpu_isa_a", "cpu_isa_a_p", "cpu_isa_b" and "cpu_isa_c"
+ add "cpu_coldfire" constant which contains all Coldfire specific cpu types
* adjust "cputypestr" and "gascputypestr"
+ add tcpuflags and cpu_capabilities (DBRA restriction was checked with CPUCOLDFIRE, CAS/TAS will be needed for atomic operations and BRAL restriction was discovered during testing of new cpu types)
m68k/cgcpu.pas:
* adjust checks for "cpu_coldfire"
m68k/n68kadd.pas:
* don't use a BRA.L if it is not supported, but (at least for now) a BRA.W
aggas.pas:
* adjusted check for Coldfire
git-svn-id: trunk@25457 -
* Changed direct references to linker classes in TSystemInfo records to enumerated ids.
* RegisterExtennalLinker and RegisterInternalLinker procedures replaced by single RegisterLinker procedure and moved to link.pas.
- TAbstractLinker is no longer necessary, removed.
This change allows to register linker once per id, rather than once per target, and also allows TSystemInfo records to be read-only.
git-svn-id: trunk@25279 -
compiles again there (it's possible to take the address of arbitrary
threadvars on the jvm platform, but not of arbitrary other variables)
- disabled inclusion of generic thread manager and threadvar support
on the jvm target if the threading feature is enabled
git-svn-id: trunk@23322 -
a win64 compiler support the x87 types extended and comp/currency handled by the FPU, this
requires to use a i386 compiler as starting compiler and cross compilation because the starting
compiler must support the 80 bit extended type
git-svn-id: trunk@23023 -
Add simple Mul+Sub/Mul+Add into MLS/MLA optimizations
Fix some other small issues in the optimizer
Implement Interlocked* functions with proper use of LDREX/STREX
git-svn-id: branches/laksen/arm-embedded@22801 -
add it everywhere in the paramanagers (where it was often forgotten)
- removed places where it was explicitly added to cdecl_pocalls checks
+ test
git-svn-id: trunk@22616 -
are indeed never followed by other characters (prevents typos such as
-EnabledFeature instead of -dEnableFeature from simply switching of
linking)
git-svn-id: trunk@22065 -
like field reordering (possible problems cracker classes) or using ebp as normal register (broken
stack traces from dump_stack)
+ niln is also valid in a cse domain
* parameters passed by reference shall have a complexity >1
* load nodes from outer scopes shall have a complexity >1
* better cse debugging
+ more node types added to cse
* consider parameters passed by reference in cse
* take care of cse in parameters in simple cases
git-svn-id: trunk@22050 -
This code will generate the following sequence on arm:
r1=dst
r0=src
movs r1, r0
rsbmi r1, r0, #0
movs will set the N-flag when the MSB of r0 is set, if it is set, rsb
will calculate dst:=0-src;
git-svn-id: trunk@21678 -
Make macro MIPS/CPUMIPS/MIPS32 common for big endian and little endian mips processors
use MIPSEL* for little endian systems
use MIPSEB* for big endian systems
git-svn-id: trunk@21599 -
- i386/cgcpu.pas: removed segment check, rejecting references with segment here is too early. These references are passed to tcgx86.a_loadaddr_ref_reg, which can generate required code for them (or reject if they are not allowed for the target).
- ncgld.pas: removed "not tf_section_threadvars in target_info" condition, it is inverse to one on the following line, making non-generic branch impossible to execute.
+ Define FPC_SECTION_THREADVARS macro if corresponding flag is set for the target.
git-svn-id: trunk@21210 -
o support for the new codepage-aware ansistrings in the jvm branch
o empty ansistrings are now always represented by a nil pointer rather than
by an empty string, because an empty string also has a code page which
can confuse code (although this will make ansistrings harder to use
in Java code)
o more string helpers code shared between the general and jvm rtl
o support for indexbyte/word in the jvm rtl (warning: first parameter
is an open array rather than an untyped parameter there, so
indexchar(pcharvar^,10,0) will be equivalent to
indexchar[pcharvar^],10,0) there, which is different from what is
intended; changing it to an untyped parameter wouldn't help though)
o default() support is not yet complete
o calling fpcres is currently broken due to limitations in
sysutils.executeprocess() regarding handling unix quoting and
the compiler using the same command lines for scripts and directly
calling external programs
o compiling the Java compiler currently requires adding ALLOW_WARNINGS=1
to the make command line
git-svn-id: branches/jvmbackend@20887 -
to low addresses in case the target cpu/OS does not support this (enabled
for reads on AIX/PPC because on AIX the first 16KB are readable)
git-svn-id: trunk@20832 -
o new eabihf (hard float) abi
o vfpv3_d16 variant of VFP (default variant used by EABI assemblers: VFPv3
with only 16 double registers instead of 32) and pass it to GNU as
o make the odd numbered single precision floating point VFP registers
available for explicit allocation for use by the calling convention
* fixed copy/paste error in stdname of S30 register
-> use -dFPC_ARMHF to create an ARM eabi hard float compiler
(mantis #21554)
git-svn-id: trunk@20660 -
Mac OS X/iOS version for the compiler code
o such a parameter is not passed, extract the information from the
environment variables MACOSX_DEPLOYMENT_TARGET/IPHONEOS_DEPLOYMENT_TARGET,
like gcc
o if neither the parameter nor the environment variable is used, use preset
default values
o pass on this version setting on to the Darwin linker
o use this setting to determine which version of the startup code (crt1.o
etc) to use, if any (based on information gathered from the GCC sources)
o define a symbol called MAC_OS_X_VERSION_MIN_REQUIRED/
IPHONE_OS_VERSION_MIN_REQUIRED based on this parameter
o for usage information, see
http://wiki.freepascal.org/FPC_New_Features_Trunk#Support_for_specifying_and_querying_the_deployment_version
git-svn-id: trunk@20503 -
When arguments are temps, they are supposed to be released by tcgcallnode.release_para_temps. However, taking address with taddrnode effectively changes original location of temp to some LOC_REGISTER, tcgcallnode.release_para_temps no longer sees the original location and therefore does not free such temps.
git-svn-id: trunk@19959 -
(= Android 4.0) java headers: java.*, javax.*, org.*, junit.*, android.*).
The RTL can also be used to target earlier versions of the Android
platform, but you manually have to take care of not using APIs that
weren't available yet. Adding separate units for separate platform
versions would only partly solve the problem, because some of the
classes used inside the system unit have also changed across
versions.
Use -Tandroid while compiling to select the Android OS as target
platform.
git-svn-id: branches/jvmbackend@19830 -
+ -CTcompactintarrayinit command line option to change the code generation
for typed array of some kind of integer-type initialization so that it
takes up less space in the bytecode (because the bytecode for all
routines, including the class initialization code that contains the
typed constant init code, is limited 64kb, large array or multiple
array constants could fairly easily bump into that limit)
git-svn-id: branches/jvmbackend@19638 -
