peter
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ecfbbeffc3
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* renamed xNNbittype to xNNinttype
* renamed registers32 to registersint
* replace some s32bit,u32bit with torddef([su]inttype).def.typ
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2004-02-03 22:32:53 +00:00 |
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florian
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e7aba71412
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* fixed several issues with flags
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2004-01-22 20:13:18 +00:00 |
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florian
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a567970402
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* fixed several arm related problems
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2003-11-30 19:35:29 +00:00 |
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florian
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8b337fb5ef
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+ type cast variant<->enum
* cnv. node second pass uses now as well helper wrappers
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2003-11-04 22:30:15 +00:00 |
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florian
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a9d9a15e20
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* fixed ARM for new reg. allocation scheme
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2003-11-02 14:30:03 +00:00 |
|
florian
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6264028af1
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* fixed reference handling
* fixed operand postfix for floating point instructions
* fixed wrong shifter constant handling
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2003-09-01 15:11:16 +00:00 |
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florian
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e36c23db74
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* results of work on arm port last weekend
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2003-09-01 09:54:57 +00:00 |
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florian
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f3266351dc
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+ started to implement FPU support for the ARM
* fixed a lot of other things
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2003-08-25 23:20:38 +00:00 |
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florian
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dc22fe7863
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* continued to work on the arm skeleton
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2003-08-21 23:23:59 +00:00 |
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