Commit Graph

431 Commits

Author SHA1 Message Date
florian
c5445399c6 * take care also of reg. allocation information after the current instruction when moving it
git-svn-id: trunk@20709 -
2012-04-05 14:21:41 +00:00
florian
9867f34398 * the arm rescheduler has not only to move instructions but also associated register allocations
git-svn-id: trunk@20707 -
2012-04-04 21:21:52 +00:00
florian
bb8be38607 - removed some no longer used constants
git-svn-id: trunk@20688 -
2012-04-01 20:49:34 +00:00
Jonas Maebe
2a8f624eb0 * fixed returning small but "non-simple" records on ARM platforms that use
the old APCS calling convention (such as iOS): they are returned by
    reference

git-svn-id: trunk@20665 -
2012-03-29 20:54:51 +00:00
Jonas Maebe
bba4b02eb2 * use r7 instead of r11 as frame pointer on Darwin/iOS, and make sure r7
always points to the previous r7 on the stack (with the saved return
    address coming right after it) so that the debugger and crashreporter
    can use it for backtraces as specified in the ABI
   o changed NR_FRAME_POINTER_REG and RS_FRAME_POINTER_REG from a symbolic
     into a typed constant, and added a new method to tprocinfo that can
     be used to initialze it (so it can be inited to r7/r11 depending on
     the target platform)
  * allow using r9 on Darwin, it was only used by the system on iOS up to
    2.x, which we no longer support
  * prefer using r9 and r12 before r4..r11 on Darwin, because they are
    volatile and hence do not have to be saved

git-svn-id: trunk@20661 -
2012-03-29 20:54:33 +00:00
Jonas Maebe
6ba8dc7146 + support for the ARM hard float EABI on Linux (patch by Peter Green):
o new eabihf (hard float) abi
   o vfpv3_d16 variant of VFP (default variant used by EABI assemblers: VFPv3
     with only 16 double registers instead of 32) and pass it to GNU as
   o make the odd numbered single precision floating point VFP registers
     available for explicit allocation for use by the calling convention
  * fixed copy/paste error in stdname of S30 register
  -> use -dFPC_ARMHF to create an ARM eabi hard float compiler
  (mantis #21554)

git-svn-id: trunk@20660 -
2012-03-29 20:50:09 +00:00
florian
0cbdc1ae6e * deactivate assembler scheduler, needs some more fixes first
git-svn-id: trunk@20537 -
2012-03-18 17:05:22 +00:00
florian
38d3a081f6 * update of TODOs
git-svn-id: trunk@20513 -
2012-03-11 20:12:46 +00:00
florian
0fe22a358b + first version of ldr instruction scheduler on arm
git-svn-id: trunk@20512 -
2012-03-11 19:10:58 +00:00
florian
e84a43768e * typo fixed
git-svn-id: trunk@20511 -
2012-03-11 08:24:44 +00:00
florian
2f5ce095ce * RefsHaveIndexReg -> cpurefshaveindexreg
* cpurefshaveindexreg defined properly in fpcdefs.inc

git-svn-id: trunk@20504 -
2012-03-10 19:43:52 +00:00
florian
7ea7031017 + cpu type armv5t
git-svn-id: trunk@20500 -
2012-03-10 19:04:22 +00:00
florian
9c6e3d317a * reenabled ldr/ldr and ldr/str optimization
git-svn-id: trunk@20497 -
2012-03-10 17:09:42 +00:00
florian
841d67ec81 * don't waste an extra register when copying 4 bytes
git-svn-id: trunk@20475 -
2012-03-05 19:12:00 +00:00
florian
b4907578b0 * temporarily disable LDR/LDR STR/LDR optimizations, let's see if this broke regression testing on fpcarm
git-svn-id: trunk@20473 -
2012-03-04 20:37:06 +00:00
florian
fdfb9a3fba * take care of conditions when doing ldr/str optimizations
git-svn-id: trunk@20428 -
2012-02-25 21:04:28 +00:00
florian
bb2df48aa9 - <op> ....; cmp ...,#0 cmps ... optimization deactivated
* optimize ldr/ldr if possible

git-svn-id: trunk@20416 -
2012-02-23 21:29:22 +00:00
florian
e2c9a8c6a1 * fold <arithmed. op> ...; cmp ...,#0into cmps on arm
* remove unnecessary ldr after str to the same memoy location, however, to do this optimization safely, we should add support for volatile variables

git-svn-id: trunk@20399 -
2012-02-22 20:16:06 +00:00
florian
ce070c93fc + patch by Jeppe Johansen to support the SC32442B
git-svn-id: trunk@20081 -
2012-01-14 21:39:32 +00:00
florian
862f9dacea * handle int_to_bool for qwordbools correctly on arm
git-svn-id: trunk@19933 -
2011-12-31 14:14:21 +00:00
pierre
42c98f3cd5 Override abstract method to abvoid warning at compilation time
git-svn-id: trunk@19578 -
2011-11-03 10:08:12 +00:00
pierre
fc9dd61f03 Avoid warning about missing fields in embedded_controllers array
git-svn-id: trunk@19577 -
2011-11-03 10:07:35 +00:00
pierre
3a7af29d3a Use aint type local variable in read_index_shift to avoid wrong typecast
git-svn-id: trunk@19576 -
2011-11-03 10:06:36 +00:00
florian
b93f4b8096 * whitespace fixes
* implicitly add PC as base register for symbols

git-svn-id: trunk@19274 -
2011-09-28 20:36:44 +00:00
florian
ce61891ca3 * offset used by A_LDF,A_STF,A_FLDS,A_FLDD,A_FSTS,A_FSTD must be dividable by 4
git-svn-id: trunk@19270 -
2011-09-28 19:01:09 +00:00
Jonas Maebe
2b11fd2bef * cpus that only understand Thumb-2 don't support "blx <imm>"
git-svn-id: trunk@19238 -
2011-09-25 20:44:39 +00:00
florian
5fa184c952 + patch by Jeppe Johansen to make use of the div/udiv instruction on arm7m, resolves #20022
* explicitly make symbol addressing PC relative

git-svn-id: trunk@19221 -
2011-09-24 21:41:01 +00:00
Jonas Maebe
852ae48cb7 * also use blx instead of bl for direct calls on ARMv5+, since the target
may be thumb(2) (mantis #19896)
  * don't conditionalize "blx <imm target>", because that's not a valid
    encoding

git-svn-id: trunk@18984 -
2011-09-05 20:33:15 +00:00
florian
0781ac1f82 + support for lpc1768 by David Welch
git-svn-id: trunk@18927 -
2011-08-31 20:17:23 +00:00
florian
34b033ba72 + armv4t
* use armv4t and armv7m, in the makefiles instead of armv7 and cortexm3

git-svn-id: trunk@18863 -
2011-08-27 20:21:42 +00:00
florian
c95f7b1c2f * remove cpu type cortex m3 on arm, it is just an ARMv7-M
git-svn-id: trunk@18862 -
2011-08-27 19:26:16 +00:00
florian
42c94d1b91 * controllerunit.inc is no longer used
git-svn-id: trunk@18852 -
2011-08-26 07:22:09 +00:00
florian
a08dfdf803 o slightly modified patch by John Clymer:
* converts the embedded information into controller specific records (arm and avr)
  * new cpu-specific units for several Stellaris (Fury and Tempest class) targets, 
  + STM32F103RB
  - old Stellaris unit has been removed

git-svn-id: trunk@18848 -
2011-08-25 21:46:26 +00:00
florian
ffde44ea6e * forgotten part of r18233
git-svn-id: trunk@18235 -
2011-08-16 22:44:50 +00:00
florian
d6ad7721e6 * patch by Jeppe Johansen to avoid corruption of frame/stack pointer by pre/post indexed operations, resolves #19679
git-svn-id: trunk@18234 -
2011-08-16 22:43:30 +00:00
florian
2eb39c8843 * patch by Jeppe Johansen to support jumptable generation for case nodes on arm/thumb-2, resolves #19502
git-svn-id: trunk@18233 -
2011-08-16 22:39:00 +00:00
florian
ff5f311b34 - removed no more used constants
git-svn-id: trunk@18199 -
2011-08-13 20:54:01 +00:00
florian
e6e6b98dd8 * stellaris => ct_stellaris
git-svn-id: trunk@18125 -
2011-08-06 19:56:01 +00:00
Jonas Maebe
da056da20f + added armv7 identifier (no special code generation, but required to
link against Xcode 3.2.6/4-generated code for ARMv7 -- use -Cparmv7,
    but note that you also have to compile the RTL and all other units with
    this option for them to be linkable against other ARMv7 code when using
    those tools)

git-svn-id: trunk@18069 -
2011-08-02 20:36:43 +00:00
florian
26850e3425 * fix full cycle after adding new boolean types
git-svn-id: branches/pasboolxx@17847 -
2011-06-27 20:11:08 +00:00
sergei
7d99f95c45 * Always create a section before emitting data to current_asmdata.asmlists[al_typedconsts]. Without it, such data ends up in sections created elsewhere, creating very non-obvious dependencies on other parts of compiler.
git-svn-id: trunk@17816 -
2011-06-24 02:05:56 +00:00
florian
77f2d6cc0d * introduce usage of TCGInt in the code generator units
git-svn-id: trunk@17459 -
2011-05-14 17:58:23 +00:00
svenbarth
35b47e491c Rebase to revision 17306
git-svn-id: branches/svenbarth/classhelpers@17314 -
2011-04-13 10:04:14 +00:00
florian
3ce9ff93f1 + patch by Jeppe Johansen to support automatic interrupt table generation by using the interrupt directive with an offset. Not activated yet because it requires to change also the startup code of the different mcus.
git-svn-id: trunk@17279 -
2011-04-10 15:59:06 +00:00
florian
8bff2a0de4 * patch by Jeppe Johansen to fix thumb2 epilog generation, resolves #18392
git-svn-id: trunk@17252 -
2011-04-05 19:25:20 +00:00
svenbarth
96116a6c3a Several adjustments because virtual methods in helpers are just normal methods and a VMT isn't generated for them either.
* $CPU/cgcpu.pas: disable the generation of VMT loading code
* dbgstabs.pas, dbgdwarf.pas: treat virtual methods of helpers as normal methods
* ncgcal.pas: don't register virtual helper methods for WPO 
* ncgrtti.pas: write virtual helper methods as normal methods to RTTI
* nobj.pas: correctly handle final and override cases in helpers
* pdecvar.pas: property getters
* rautils.pas: no VMT offset in records

git-svn-id: branches/svenbarth/classhelpers@17150 -
2011-03-20 10:41:45 +00:00
svenbarth
80e6498921 Rebase to revision 17096
git-svn-id: branches/svenbarth/classhelpers@17099 -
2011-03-09 16:29:47 +00:00
Jonas Maebe
b8e9fd5c00 * use blx also for ARMv5, since it works on non-T variants and is required
for correct operation on T-variants (patch by Dejan Boras, mantis #18819)

git-svn-id: trunk@17001 -
2011-02-25 19:46:35 +00:00
Jonas Maebe
bbf0e35a51 + Support for ARM CPS/CPSIE/CPSID instructions and mode flag bitfield
operand (patch by Jeppe Johansen, mantis #18334)

git-svn-id: trunk@16750 -
2011-01-11 16:02:51 +00:00
Jonas Maebe
780e75bfac o patch by Jeppe Johansen to fix mantis #17472:
* generate add.w instead of add for thumb-2 in case one of the registers
      is > r8
    * add register interferences for the "add" instruction so the register
      allocator can detect invalid instruction forms (even for assembler code)
    * fixed error in thumb2.inc detected by the previous change

git-svn-id: trunk@16633 -
2010-12-24 15:54:39 +00:00