Commit Graph

16 Commits

Author SHA1 Message Date
nickysn
07a8af33b1 + z80: generate correct code in do_spill_read and do_spill_written for spilling to temp offsets outside the range -128..127
git-svn-id: trunk@45157 -
2020-04-28 19:31:11 +00:00
nickysn
b741ed63b0 - commented out internal error in trgcpu.do_spill_read and trgcpu.do_spill_written
git-svn-id: branches/z80@44988 -
2020-04-22 02:31:21 +00:00
nickysn
85e3ad2193 * fixed warnings in Z80 rgcpu
git-svn-id: branches/z80@44827 -
2020-04-19 04:38:47 +00:00
nickysn
513ef512ff - removed redundant opcode:=A_LD assignments in do_spill_replace
git-svn-id: branches/z80@44769 -
2020-04-18 00:51:48 +00:00
nickysn
721bbe636b + support the bit,set and res instructions in do_spill_replace
git-svn-id: branches/z80@44768 -
2020-04-18 00:50:43 +00:00
nickysn
81ccf6935c + support the rlc,rl,rrc,rr,sla,sra and srl instructions in do_spill_replace
git-svn-id: branches/z80@44767 -
2020-04-18 00:42:47 +00:00
nickysn
9309e2c42e * replace 'add/adc/sub/sbc/and/or/xor/cp orgreg' with 'add/adc/sub/sbc/and/or/xor/cp spilltemp' in
trgcpu.do_spill_replace

git-svn-id: branches/z80@44553 -
2020-04-03 22:42:02 +00:00
nickysn
e43834c5d0 * replace 'inc/dec orgreg' with 'inc/dec spilltemp' in trgcpu.do_spill_replace
git-svn-id: branches/z80@44552 -
2020-04-03 22:19:40 +00:00
nickysn
9d545342f8 * replace 'add/adc/sub/sbc/and/or/xor/cp A,orgreg' with 'add/adc/sub/sbc/and/or/xor/cp A,spilltemp' in trgcpu.do_spill_replace
git-svn-id: branches/z80@44537 -
2020-04-03 20:05:42 +00:00
nickysn
a58bab4318 + replace 'ld orgreg,const' with 'ld spilltemp,const' in trgcpu.do_spill_replace
git-svn-id: branches/z80@44536 -
2020-04-03 19:47:47 +00:00
nickysn
fe3f4a7447 * fixes in trgcpu.do_spill_replace
git-svn-id: branches/z80@44535 -
2020-04-03 19:41:39 +00:00
nickysn
8ceee70912 * range check for spilltemp.offset in [-128..127], not [0..63] in trgcpu.do_spill_replace for Z80
git-svn-id: branches/z80@44534 -
2020-04-03 19:32:10 +00:00
nickysn
8291d24b7f * fix comment
git-svn-id: branches/z80@44533 -
2020-04-03 18:53:52 +00:00
nickysn
65efc495af + add edges to disallow the use of the 8-bit subregisters of IX, IY and SP
git-svn-id: branches/z80@44513 -
2020-04-02 02:28:14 +00:00
florian
e370e9ba15 * register names fixed
git-svn-id: branches/z80@35670 -
2017-03-27 20:30:51 +00:00
florian
ea52a23179 + skeleton for Z80 support
git-svn-id: branches/z80@35665 -
2017-03-26 19:10:50 +00:00