florian
a4ca9f5357
* upated syscalls
...
+ RiscV specific syscalls added
2025-01-18 23:04:07 +01:00
Pierre Muller
b1a47a5d7d
Use '__global_pointer$' special linker symbol to set gp,
...
because its value can be different from __BSS_END__ - 0x800.
Details from binutils-2.40/ld/emulparams/elf32lriscv-defs.sh
// We must cover as much of sdata as possible if it exists. If sdata+bss is
// smaller than 0x1000 then we should start from bss end to cover as much of
// the program as possible. But we can't allow gp to cover any of rodata, as
// the address of variables in rodata may change during relaxation, so we start
// from data in that case.
OTHER_END_SYMBOLS="${CREATE_SHLIB-__BSS_END__ = .;
__global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,
MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));}"
2025-01-16 17:20:14 +00:00
Sven/Sarah Barth
9fccadc1f0
* leave GetFileContents() early if the file size is 0 to avoid a range error if the RTL is compiled with range checks
2025-01-13 23:30:02 +01:00
Sven/Sarah Barth
5af16b3da3
* apply patch by Michael Ring to fix compilation for ARM THUMB
2025-01-09 07:39:18 +01:00
Sven/Sarah Barth
f29fe358ad
- remove unnecessary defines
2025-01-08 23:06:29 +01:00
Sven/Sarah Barth
40725146cc
+ add intrinsic for 8-bit atomic cmpxchg for wasm32 (this way the fallback for cmxchg is no longer used for wasm32)
2025-01-08 23:06:29 +01:00
Michaël Van Canneyt
8488c87b20
* New fix for fpc_atomic_cmp_xchg_alu, as suggested by Sven
2025-01-08 14:56:16 +01:00
Michaël Van Canneyt
5d100fd2c6
cpuNbitalu is not the correct type for fpc_atomic_cmp_xchg_alu on webassembly
2025-01-08 12:06:52 +01:00
Michaël Van Canneyt
3f0593b554
* Better fix for atomic operations on wasm
2025-01-07 14:42:21 +01:00
Michaël Van Canneyt
ec7e917b1a
Use correct defines for ALUSInt, fixes problems encountered in webassembly
2025-01-06 14:10:27 +01:00
Rika Ichinose
9dfbc38a50
Don’t use explicit Move in Extract<T> and Swap<T>.
2024-12-23 21:06:22 +00:00
Rika Ichinose
f1050aeb73
Simplify dynarr.inc.
2024-12-22 21:41:31 +00:00
Michaël Van Canneyt
a8345da53f
* TBasicActionLink.Update must always return value. Fix issue #41070
2024-12-20 12:28:20 +01:00
Rika Ichinose
6035058a21
Shorten generic atomic implementations to offset the LoC cost of the commit before last.
...
This also fixes wrong fpc_atomic_sub_8 and fpc_atomic_sub_16 emulations.
2024-12-19 19:42:25 +00:00
Rika Ichinose
94a1f33f60
Shorten i386 and x86-64 atomic implementations to offset the LoC cost of the previous commit.
2024-12-19 19:42:25 +00:00
Rika Ichinose
bb43afd26d
Add more specialized atomics for i386 and x86-64.
2024-12-19 19:42:25 +00:00
Michaël Van Canneyt
73287c1fa8
* Patch from Bart B to improve Slice(). Fixes issue #41068
2024-12-18 20:41:55 +01:00
Sven/Sarah Barth
ae938e16a5
* correctly disable the Atomic*Lock functions for the fpc_atomic_cmp_xchg_*() helper fallback of the CPU size
2024-12-16 23:13:36 +01:00
Karoly Balogh
c2ceb4bb99
m68k-amiga: fix typo from commit e94d02a0
that broke the build
2024-12-13 01:18:31 +01:00
Sven/Sarah Barth
e94d02a067
* with all existing RTLs switched over to the atomic intrinsics, the define FPC_SYSTEM_INTERLOCKED_USE_INTRIN can be removed again
2024-12-12 22:05:20 +01:00
Sven/Sarah Barth
9b302983b0
* switch LoongArch 64 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:19 +01:00
Sven/Sarah Barth
16f9ab3bdb
* switch Xtensa RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:19 +01:00
Sven/Sarah Barth
128a87a2dc
* switch AVR RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:18 +01:00
Sven/Sarah Barth
19d908a964
* switch RISC-V 64 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:18 +01:00
Sven/Sarah Barth
20d9ddf5ae
* switch RISC-V 32 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:18 +01:00
Sven/Sarah Barth
573b82c67f
* switch WebAssembly RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:18 +01:00
Sven/Sarah Barth
546c3093f7
* switch Z80 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:18 +01:00
Sven/Sarah Barth
5346faa02c
* switch PowerPC 64 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:18 +01:00
Sven/Sarah Barth
fdd0ebeed9
* switch PowerPC 32 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:17 +01:00
Sven/Sarah Barth
5a6f7b3e29
* switch MIPS RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:17 +01:00
Sven/Sarah Barth
7be06582b2
* switch SPARC 64 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:17 +01:00
Sven/Sarah Barth
2e54ad65fb
* switch SPARC 32 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:17 +01:00
Sven/Sarah Barth
60b8dd4276
* switch i8086 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:16 +01:00
Sven/Sarah Barth
a815beea2c
* switch M68k RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:16 +01:00
Sven/Sarah Barth
5d6c8130a0
* switch ARM RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:16 +01:00
Sven/Sarah Barth
1ce0204088
* switch Aarch64 RTL to provide atomic intrinsic helpers instead of Interlocked* functions
2024-12-12 22:05:16 +01:00
Sven/Sarah Barth
ba7e87aff3
* switch x86_64 RTL to provide the atomic intrinsics instead of Interlocked* functions
2024-12-12 22:05:16 +01:00
Sven/Sarah Barth
295d3f0969
* switch i386 RTL to provide the atomic intrinsics instead of Interlocked* functions
2024-12-12 22:05:16 +01:00
Sven/Sarah Barth
b9a198b1a8
- remove unused variables
2024-12-12 22:05:15 +01:00
Sven/Sarah Barth
9d10123b0d
- remove unused variables
2024-12-12 22:05:15 +01:00
Sven/Sarah Barth
7f4b2f63b3
Switch from functions for the Atomic*-family to intrinsics
2024-12-12 22:05:15 +01:00
Sven/Sarah Barth
9cbc802d0d
+ add platform independent helper routines for the atomic intrinsics; these only require the implementation of the size specific fpc_atomic_cmp_xhg_* helper, but if only the CPU size specific helper is implemented the others will at least be safe for multi threading inside the same process
2024-12-12 22:05:14 +01:00
marcoonthegit
f429dab7b3
* fix from #41053 . Add cc_anycolor
2024-12-09 22:54:32 +01:00
florian
e471c08cf8
+ SHA512Support
2024-12-07 11:10:34 +01:00
florian
73e96f8f1e
* simplify SysResetFPU
2024-12-06 21:21:02 +01:00
florian
f72183eb37
* ensure always an exception is raised in genmath.inc if appropriate
2024-12-05 22:17:18 +01:00
florian
072f1bfb29
+ SysResetFPU for Aarch64
2024-12-05 22:03:27 +01:00
Rika Ichinose
91d3746adf
Use FillChar in InitializeArray.
2024-11-30 21:45:29 +00:00
marcoonthegit
83cc5be952
* remove functions commented in the commdlg/ctl spinoff of 2008
2024-11-27 23:06:26 +01:00
Michaël Van Canneyt
6f5f567087
* Patch from Amexander Bagel to restore Delphi-compatible behaviour in TThread.Queue. Fixes issue #41043
2024-11-26 08:52:40 +01:00