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182 Commits

Author SHA1 Message Date
nickysn
3f62fb7fe7 + enabled FPU emulation for the Z80 
git-svn-id: branches/z80@45007 -
 2020-04-22 22:18:33 +00:00
nickysn
d2c32efb7b * synchronized with trunk 
git-svn-id: branches/z80@44809 -
 2020-04-18 23:47:30 +00:00
Jonas Maebe
ea2e516b4e + -ib parameter to print the code generator backend type: FPC or LLVM 
* some cleanups related to -i printing

git-svn-id: trunk@44787 -
 2020-04-18 15:44:42 +00:00
nickysn
6a2dbad8ca * synchronize with trunk 
git-svn-id: branches/z80@44555 -
 2020-04-04 00:36:08 +00:00
florian
ba3de67f3b + Xtensa: the boolean extension is used as flags 
git-svn-id: trunk@44538 -
 2020-04-03 20:15:22 +00:00
nickysn
755fe97c51 * synchronize with trunk 
git-svn-id: branches/z80@44397 -
 2020-03-29 16:24:32 +00:00
florian
73c68236b6 * Xtensa: completed compiler skeleton 
git-svn-id: trunk@44323 -
 2020-03-21 12:49:45 +00:00
florian
9e40d536cb + Xtensa: initial skeleton completed 
+ xtensa-embedded support in the compiler

git-svn-id: trunk@44318 -
 2020-03-20 22:34:33 +00:00
florian
6b47d9d9ed * safecall support is meanwhile generic, so enabled for all linux targets 
git-svn-id: trunk@44076 -
 2020-01-31 21:58:49 +00:00
Jonas Maebe
ac1e0f96bd * replaced tentryfile.get/putsmall/normalset() with a common tget/putset 
that expects an open array of byte, and use it for all sets
   o since all sets need to be typecasted to an array type of the appropriate
     size, we'll get a compilation error in case this needs to be done and
     that also tells us at the same time that the ppu version will need to
     be increased
  * enabled {$packset 1} for the compiler, as this is now safe with the above
    changes

git-svn-id: trunk@43407 -
 2019-11-06 21:50:19 +00:00
svenbarth
3ae1b04d09 * disable the use of C-operators inside the compiler's sources 
git-svn-id: trunk@43120 -
 2019-10-05 09:42:52 +00:00
Károly Balogh
4936358bee m68k: fpu capabilities support 
git-svn-id: trunk@42739 -
 2019-08-19 15:07:22 +00:00
florian
ba203c0564 + x86 makes use of fpu_capabilities 
* moved CPUX86_HAS_AVXUNIT to FPUX86_HAS_AVXUNIT
+ mm register allocator can be initialized with 32 mm registers of AVX512

git-svn-id: trunk@42707 -
 2019-08-16 11:35:03 +00:00
florian
c418d63c16 + create defines with FPU capabilites 
+ make use of FPU capability defines in the rtl

git-svn-id: trunk@42681 -
 2019-08-13 22:12:49 +00:00
Jonas Maebe
c262c5dbc9 * synchronised with trunk till r42256 
git-svn-id: branches/debug_eh@42257 -
 2019-06-20 17:21:34 +00:00
florian
17c48694a5 * fix bootstrapping with 3.0.x and -O3 
git-svn-id: trunk@42197 -
 2019-06-09 20:05:21 +00:00
Jonas Maebe
a0f850d57f * synchronised with trunk till r41885 
git-svn-id: branches/debug_eh@41886 -
 2019-04-16 16:20:44 +00:00
Jeppe Johansen
2b78a8fd3d - Add support for .option directive in riscv assembler. 
- Use addiw when adjusting U32 to S32

git-svn-id: trunk@41870 -
 2019-04-14 20:51:29 +00:00
Jonas Maebe
9d07e4948f * fix compilation of ARM compiler for LLVM 
git-svn-id: branches/debug_eh@41210 -
 2019-02-03 21:09:54 +00:00
Jonas Maebe
04d295f186 * first step towards supporting 32 bit targets with the LLVM code generator: 
use the generic code in more cases when cpuhighleveltarget is defined

git-svn-id: trunk@41133 -
 2019-01-29 21:39:09 +00:00
pierre
29bcef2825 Fix compilation (with -st option) of compiler for macos OS target 
git-svn-id: trunk@41065 -
 2019-01-25 08:00:58 +00:00
yury
88365b6d92 * Enabled safecall support for aarch64 to be on par with other cpus. 
git-svn-id: trunk@39903 -
 2018-10-08 08:37:18 +00:00
Jeppe Johansen
ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 
git-svn-id: branches/laksen/riscv_new@39474 -
 2018-07-20 08:21:15 +00:00
pierre
c654739db9 Change default settings for i8086 compiler when compiled for go32v2 OS, to avoid use of Watcom tools 
git-svn-id: trunk@39340 -
 2018-06-29 09:41:38 +00:00
nickysn
61e6d2afec + introduce asd_omf_linnum_line directives; they will be used for writing LINNUM 
entries in the OMF object format

git-svn-id: trunk@39007 -
 2018-05-16 17:05:02 +00:00
pierre
2a49627d48 Allow compilation of ppc386 compiler using FPC_SOFT_FPUX80, i.e. soft float 80-bit extended float 
git-svn-id: trunk@37295 -
 2017-09-21 14:36:48 +00:00
nickysn
627f45abac + define cpucg64shiftsupport for i8086, which enables the 64-bit inline sar 
support (64-bit shl and shr are already inlined on i8086, regardless of the
  presence of this define). As a side effect, this also improves the code,
  generated for 64-bit divisions by power-of-2 constants on i8086.

git-svn-id: trunk@37019 -
 2017-08-21 14:38:56 +00:00
florian
7f286eb54e + define cpudelayslot: set during compiler compilation for CPUs having branch instructions with delay slot (MIPS, SPARC) 
git-svn-id: trunk@36958 -
 2017-08-20 17:20:38 +00:00
Károly Balogh
0b561b6c8f powerpc: enable SUPPORT_GET_FRAME 
git-svn-id: trunk@36698 -
 2017-07-08 23:51:55 +00:00
Károly Balogh
30176f3116 m68k: enable inlined get_frame for m68k 
git-svn-id: trunk@36577 -
 2017-06-22 17:43:24 +00:00
Károly Balogh
cf8aebf00f m68k: enabled safecall exception wrappers with linux 
git-svn-id: trunk@36575 -
 2017-06-22 15:31:32 +00:00
nickysn
408b7a8807 + enable the code page aware compiler messages for all unices 
git-svn-id: trunk@36451 -
 2017-06-08 18:39:09 +00:00
nickysn
a34f531661 + implemented support for codepage aware compiler messages. It can be enabled 
per platform (currently only enabled for win32 and win64). Enabling it forces
  code page conversion from the codepage of the .msg file to CP_ACP, before
  writing the message to the console. Not enabling it keeps the previous
  behaviour of not doing any kind of code page conversion for messages. This
  feature should be tested and enabled per platform, because it requires code
  page conversion support in the rtl (so it may require adding the appropriate
  extra units, such as fpwidestring). When this feature is enabled for all
  platforms, we can start keeping only one .msg file per language, because
  having extra .msg files for different encodings for the same language becomes
  redundant, since the compiler can do code page conversion to whatever code
  page the console uses.

git-svn-id: trunk@36450 -
 2017-06-08 16:11:33 +00:00
florian
8b19610509 + sparc32 for normal sparc to be used in the compiler 
git-svn-id: trunk@36428 -
 2017-06-05 21:31:36 +00:00
florian
188ec0f0c7 + basics for sparc64 support, we continue to use the name "sparc" for sparc32, both sparc are identified by sparcgen (dirs, defines etc.) 
git-svn-id: trunk@36374 -
 2017-05-30 21:17:17 +00:00
Károly Balogh
b3157aa5ea m68k: generate MUL helpers for CPUs without 32bit MUL already in pass 1 
git-svn-id: trunk@36348 -
 2017-05-26 18:46:19 +00:00
Károly Balogh
3e8ee48458 m68k: define cpurox and enabled the rotate-related optimizations on CPUs which support rotate instructionsoptions.pas 
git-svn-id: trunk@36302 -
 2017-05-23 00:16:29 +00:00
nickysn
d7c8a081a1 + enable using the cg64 ops OP_SHR/OP_SHL/OP_SAR on i386 for implementing the 
64-bit in_sar/shl/shr_assign_x_y inline nodes

git-svn-id: trunk@35835 -
 2017-04-18 14:36:41 +00:00
nickysn
321876252b + enabled the rol/ror intrinsic on i8086 
git-svn-id: trunk@35734 -
 2017-04-04 22:37:58 +00:00
florian
ea52a23179 + skeleton for Z80 support 
git-svn-id: branches/z80@35665 -
 2017-03-26 19:10:50 +00:00
Károly Balogh
4ee4099fca m68k: introduce a register calling convention, inspired by VBCC. volatile registers are used to pass arguments 
git-svn-id: trunk@34821 -
 2016-11-06 18:00:29 +00:00
florian
046b148f5f * i386 and i8086 have an index register, so define cpurefshaveindexreg 
git-svn-id: trunk@33540 -
 2016-04-21 19:50:47 +00:00
pierre
885b0034c5 Allow use of stabs for 64-bit systems with -dUSE_STABS_64 
git-svn-id: trunk@32185 -
 2015-10-29 09:23:30 +00:00
Jonas Maebe
1c2bac7608 - removed FPC_HAS_VARSETS-related checks, FPC 2.6.4 has it 
git-svn-id: trunk@31690 -
 2015-09-15 11:51:42 +00:00
Jonas Maebe
3f9f498e0d - removed leftover alpha, ia64 and vis code 
git-svn-id: trunk@31446 -
 2015-08-28 22:31:29 +00:00
florian
ba1297b1ab + provide also 8 and 16 bit div/mod helper 
* tmoddivnode.first_moddivint does not force a 32 bit helper, the used helper depends now on the resultdef type set by tmoddivnode.pass_typecheck

git-svn-id: trunk@31195 -
 2015-07-05 20:16:50 +00:00
Jonas Maebe
3ab62fc36e * define TSymStr as ansistring for llvm, as its type definitions can be quite long 
git-svn-id: trunk@30605 -
 2015-04-15 18:29:44 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
Jonas Maebe
41fba0c4f7 * switched to using the stack pointer as base register for the temp allocator 
instead of the frame pointer register:
      1) we exactly know the offsets of the temps from the stack pointer
         after pass 1 (based on the require parameter stack size for called
         routines), while we don't know it for the frame pointer (it depends
         on the number of saved registers)
      2) temp offsets from the stack pointer are positive while those from
         the frame pointer are negative, and we can directly encode much
         bigger positive offsets in the instructions
   o move the stack pointer register to a virtual register in
     loadparentfpn, because many instructions cannot directly operate
     on/with the stack pointer
   o add the necessary register interference edges for the stack pointer
     register

git-svn-id: trunk@29938 -
 2015-02-23 22:54:03 +00:00
Jonas Maebe
7949bebb8d * synchronised with r28168 of trunk 
git-svn-id: branches/hlcgllvm@28169 -
 2014-07-05 21:30:28 +00:00