paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-05-01 05:13:43 +02:00
Code Issues Packages Projects Releases Wiki Activity
50,661 Commits 100 Branches 75 Tags 305 MiB
b8c4dd9e18
Commit Graph

132 Commits

Author SHA1 Message Date
nickysn
b8c4dd9e18 + implemented 64-bit OP_SHR,OP_SHL and OP_SAR in a_op64_reg_reg for i8086 and 
use it in the shl/shr node for code generation.

git-svn-id: trunk@36018 -
 2017-04-29 21:57:48 +00:00
nickysn
a82c89d894 + implemented OP_SHR,OP_SHL and OP_SAR in a_op64_const_reg for i8086. The shlshr 
node now uses them for 64-bit shift by constant.

git-svn-id: trunk@36017 -
 2017-04-29 20:58:55 +00:00
nickysn
65977f9f27 + implemented OP_ROL and OP_ROR in tcg8086.a_op_reg_reg and .a_op_reg_ref 
git-svn-id: trunk@35952 -
 2017-04-25 13:46:20 +00:00
nickysn
8c200fcfba + implemented OP_SHR,OP_SHL,OP_SAR,OP_ROL and OP_ROR in tcg8086.a_op_const_ref 
git-svn-id: trunk@35945 -
 2017-04-25 11:06:12 +00:00
nickysn
50b1c9c088 + implemented 32-bit OP_SHR,OP_SHL and OP_SAR in tcg8086.a_op_reg_ref 
git-svn-id: trunk@35935 -
 2017-04-24 13:43:18 +00:00
nickysn
7ee0c07b8d + added flags register tracking for many i8086 operations 
git-svn-id: trunk@35848 -
 2017-04-19 13:46:20 +00:00
nickysn
256dc546ac + implemented the in_neg_assign_x and in_not_assign_x inline nodes, which will 
be used (TBD in a future commit) for optimizing x:=-x and x:=not x on CPUs
  that support performing these operations directly in memory (such as x86)

git-svn-id: trunk@35749 -
 2017-04-07 16:02:40 +00:00
nickysn
9093047a7a * fixed a bug in the i8086 32-bit rol/ror code generation method rm_fast_386 
git-svn-id: trunk@35745 -
 2017-04-06 15:55:43 +00:00
nickysn
1560f20e7f + implemented other 32-bit rol/ror by const methods for i8086 and added a 
(hopefully) reasonable selection for them for all consts between 1 and 31

git-svn-id: trunk@35744 -
 2017-04-06 15:41:39 +00:00
nickysn
0fd860d9e7 * refactored the code generation for 32-bit rol/ror by const for i8086, so it 
uses less code repetition and allow choosing various methods (some of which
  will be implemented later and selected, according to the cpu and optimization
  settings (size vs speed))

git-svn-id: trunk@35743 -
 2017-04-06 13:59:53 +00:00
nickysn
d5e33cce7f * generate better i8086 code for ror32 by 1 and 17 
git-svn-id: trunk@35741 -
 2017-04-05 14:16:00 +00:00
nickysn
321876252b + enabled the rol/ror intrinsic on i8086 
git-svn-id: trunk@35734 -
 2017-04-04 22:37:58 +00:00
nickysn
76cb419241 * use 16-bit 386+ instructions (shld,shrd) for performing fast 32-bit 
shl/shr/sar on i8086, in a_op_const_reg, when the target CPU is set to 80386
  or later

git-svn-id: trunk@35726 -
 2017-04-04 14:40:29 +00:00
nickysn
0ab4f01668 * implemented fast (loopless) 32-bit shift by constant for 8086 as well 
git-svn-id: trunk@35725 -
 2017-04-03 21:04:59 +00:00
nickysn
0f2ad7b712 * generate faster (i.e. loopless) code for 32-bit shl/shr/sar by const on 186+ 
git-svn-id: trunk@35723 -
 2017-04-03 20:37:21 +00:00
nickysn
f0a63fa895 + added an optimized implementation of a_op64_reg_ref for i8086; this improves 
the generated code on i8086 for things like inc(int64_var,int64_var) and
  dec(int64_var,int64_var)

git-svn-id: trunk@35657 -
 2017-03-25 18:45:31 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references 
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
 2016-11-27 18:17:37 +00:00
svenbarth
c8202061dc * get rid of addr_load_indirect again by having tcgx86 provide an internal implementation of both make_simple_ref() and a_load_ref_reg() so that make_direct_ref() can call the latter (and the latter the former) without fear of inifinite recursive calls due to the symbol; a_load_ref_reg() is additionally declared as "final" as a_load_ref_reg_internal() needs to be overloaded instead (which is the case for tcg8086) 
git-svn-id: trunk@34579 -
 2016-09-30 14:01:02 +00:00
Jonas Maebe
aa1be3276f - removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol(): 
it was AT_NONE, which is invalid and should never be used
  * explicitly pass the correct value for all calls to those methods elsewhere
    in the compiler

git-svn-id: trunk@34250 -
 2016-08-05 07:09:16 +00:00
nickysn
ac5658470e + use the 16-bit movsx and movzx instructions on 386+ in tcg8086.a_load_ref_reg 
as well

git-svn-id: trunk@34050 -
 2016-07-02 17:05:48 +00:00
nickysn
a5f1ae97d4 + make use of the 16-bit movsx and movzx instructions in tcg8086.a_load_reg_reg 
when the cpu target is 80386 or later

git-svn-id: trunk@34046 -
 2016-07-02 14:06:25 +00:00
nickysn
c78f406d99 + implemented proper stack checking for the i8086 
git-svn-id: trunk@33787 -
 2016-05-24 23:57:47 +00:00
pierre
40193ea1db Add pi_has_open_array_parameter to proc_info.flags as this requires special handling for i8086 huge memory model to restore DS register correctly 
git-svn-id: trunk@32922 -
 2016-01-11 15:02:10 +00:00
Jonas Maebe
d440daf47f * fixed compilation with -Oodfa/-O3 
git-svn-id: trunk@32152 -
 2015-10-25 19:21:57 +00:00
nickysn
09218c88aa + optimizations in tcg8086.g_flags2reg for the case where the carry flag or the 
inverted carry flag is converted to int, using shorter branchless code and
  the adc/rcl/sbb instructions

git-svn-id: trunk@32106 -
 2015-10-20 23:22:32 +00:00
nickysn
b26e10d53c + generate proper win16 prologue/epilogue for exported routines (we don't yet 
actually export them from the .exe or .dll, but they can now be used as
  callbacks)
+ support win16 smart callbacks via the $K switch

git-svn-id: trunk@31835 -
 2015-09-26 18:04:59 +00:00
nickysn
bdfd23cc2e + new target switch "FarProcsPushOddBP", which causes the i8086 compiler to push 
odd values of BP if the procedure is far. Enabled this by default for Win16.

git-svn-id: trunk@31569 -
 2015-09-07 19:05:18 +00:00
nickysn
a1d29b8251 * always pop DS in huge memory models in asm routines that don't specify 
'nostackframe'

git-svn-id: trunk@31520 -
 2015-09-04 21:51:04 +00:00
nickysn
98ec7a2211 * eliminated the dual initialization of DS in interrupt procedures in the huge 
memory model

git-svn-id: trunk@31519 -
 2015-09-04 21:37:07 +00:00
nickysn
0fdc62e0f7 + initialize DS with the current unit's data segment in the function entry code 
generated in the huge memory model

git-svn-id: trunk@31500 -
 2015-09-03 21:44:16 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
florian
35a04ad095 * modified patch of Paul W to replace leave by mov/pop, resolves #26455 
git-svn-id: trunk@29633 -
 2015-02-05 20:51:12 +00:00
Jonas Maebe
b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 
for some platforms it depends on that routine

git-svn-id: branches/hlcgllvm@28492 -
 2014-08-19 20:22:54 +00:00
Jonas Maebe
a637fbe596 * moved all g_exception_*() methods to hlcgobj and cleaned them up (no more 
hardcoded registers for the most part)
  + added extra g_exception_discard_reason() that can be called when we only
    want to get rid of the currently pushed exception reason, and don't have
    to load it (so it can do nothing on platforms that don't use push/pop)

git-svn-id: branches/hlcgllvm@28481 -
 2014-08-19 20:22:24 +00:00
nickysn
791cd932fd + support i8086 far data memory models in tcg8086.g_intf_wrapper 
git-svn-id: trunk@27722 -
 2014-05-03 14:17:54 +00:00
nickysn
906d828ee0 * tcg8086.g_copyvaluepara_openarray: fix for the case where ref.segment is 
specified, but equal to DS in the current memory model -> call the high level
  code generator with a near pointer type in order to force the segment to be
  ignored

git-svn-id: trunk@27716 -
 2014-05-01 22:28:07 +00:00
nickysn
c9c29a3cd4 + ignore the source segment, when the destination cgpara is a near pointer in 
tcg8086.a_loadaddr_ref_cgpara

git-svn-id: trunk@27715 -
 2014-05-01 21:56:04 +00:00
nickysn
c9f8703679 + set ref.segment to NR_SS for all temps/localvars on i8086. This allows the 
segment to survive e.g. several nested vecnodes, which cause the base register
  to change from BP to something else. In the cases where the ss: prefix is not
  needed, it is removed by make_simple_ref.
+ remove the ss: prefix in the several cases where make_simple_ref isn't called
  (namely spilling and tcg8086.a_call_reg_far)

git-svn-id: trunk@27714 -
 2014-05-01 21:18:47 +00:00
nickysn
bf6ad0ff78 * fixed tcg8086.g_flags2reg, so it behaves the same way as tcgx86.g_flags2reg 
after r27581 in regard to floating point comparisons. The tcmpnan.pp test now
  almost works (i.e. fails due to only one error, instead of many).

git-svn-id: trunk@27605 -
 2014-04-19 22:54:29 +00:00
sergei
98de3c4e40 * tcg8086.g_flags2reg: call virtual method a_jmp_flags instead of duplicating its functionality, it prevents further changes to this method when adding support for unordered comparison results. 
git-svn-id: trunk@27579 -
 2014-04-14 00:20:06 +00:00
nickysn
6fe362a1b0 + added method is_far to i8086's tcpuprocdef and tcpuprocvardef 
+ added helper function to i8086's symcpu is_proc_far that dispatches the call
  to the proper is_far method (because we can't make a cpu specific descendant
  of tabstractprocdef and add it there)
* all checks for (po_far in procoptions) in the i8086 code generator replaced
  with calls to is_proc_far

git-svn-id: trunk@27559 -
 2014-04-13 12:41:46 +00:00
nickysn
9da1ee0138 * i8086 far data model fixes in the copying of openarray value params 
git-svn-id: trunk@27470 -
 2014-04-04 20:18:47 +00:00
nickysn
0a9f738167 + tcg8086.g_copyvaluepara_openarray: support source to be in a different segment 
git-svn-id: trunk@27393 -
 2014-03-30 19:55:11 +00:00
nickysn
1f8280e8f1 * load the destination segment in tcg8086.g_copyvaluepara_openarray from SS 
instead of DS, because the destination is on the stack, but in some memory
  models DS may be different than SS

git-svn-id: trunk@27391 -
 2014-03-30 19:10:21 +00:00
nickysn
122f66b11a + support passing far addresses in tcg8086.a_loadaddr_ref_cgpara 
git-svn-id: trunk@27276 -
 2014-03-25 00:45:22 +00:00
sergei
9c54cdc85d * x86: Cleaned out addr_far,addr_far_ref used to encode far calls/jumps. NASM (and FPC x86 assembler based on it) already have opsize=S_FAR for this purpose. 
git-svn-id: trunk@27037 -
 2014-03-08 22:54:43 +00:00
nickysn
b672bc754a - rm references to system_i386_darwin and system_i386_iphonesim from 
tcg8086.init_register_allocators

git-svn-id: trunk@26910 -
 2014-03-01 12:52:31 +00:00
nickysn
a31b7d485f * tcg8086.init_register_allocator: instantiate trgintcpu instead of trgcpu for 
the integer registers in all cases

git-svn-id: trunk@26909 -
 2014-03-01 12:50:26 +00:00
nickysn
fc29e10349 * allow the use of inc/dec when adding/subtracting 32 or 64-bit constants with 
the highest word equal to one and the lower parts zero

git-svn-id: trunk@26907 -
 2014-03-01 10:25:46 +00:00
sergei
9c1f917e3a * a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around. 
+ x86 targets now directly call procedure variables located in references.
- a_call_ref method removed from tcg and thlcgobj.

git-svn-id: trunk@26666 -
 2014-02-03 13:28:56 +00:00