r41065 | pierre | 2019-01-25 08:00:58 +0000 (Fri, 25 Jan 2019) | 1 line
Fix compilation (with -st option) of compiler for macos OS target
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--- Merging r41065 into '.':
U compiler/fpcdefs.inc
U compiler/cfileutl.pas
--- Recording mergeinfo for merge of r41065 into '.':
U .
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r41074 | pierre | 2019-01-25 18:35:33 +0000 (Fri, 25 Jan 2019) | 1 line
Add missing ESysEMSGSIZE and ESysEOPNOTSUPP for beos
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--- Merging r41074 into '.':
U rtl/beos/errno.inc
--- Recording mergeinfo for merge of r41074 into '.':
G .
git-svn-id: branches/fixes_3_2@41227 -
Revision(s) 39739, 39749, 39860, 39862, 39865, 39869, 39871, 39903, 39905, 39917, 39956, 39959-39960, 39969, 39971, 39980, 39987, 40198-40201, 40472, 40532, 40535-40536 from trunk:
* Android: The list of supported syscalls has been auto-generated directly from android sources for each CPU.
* Minor adjustments to make all compilable with the proper list of Android syscalls.
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* Re-generated lists of android syscalls by a new script. The lists are more correct now. The script's location: https://svn.freepascal.org/svn/fpcbuild/scripts/android
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* Fixed UnhookSignal when RTL_SIGDEFAULT is passed. The bug have caused crash on aarch64-android due to out of bounds read of the rtlsig2ossig[] array.
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+ Added support for the aarch64-android target.
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* Set ICU data dir if it is not set by the system. It fixes issues on newer Android versions.
* Added more predefined ICU versions.
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* android: Use the current dir as temp.
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* Corrected TUContext record for aarch64-linux and aarch64-android. It fixes obtaining of an address of the instruction where a signal has thrown.
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* Enabled safecall support for aarch64 to be on par with other cpus.
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* Android: Reworked the startup code to use no assembly instructions. Generic assembler startup files contains only section data and are compiled for each CPU.
* Android: argc and argv are correct for shared libraries.
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* Use syscall_nr_renameat for android.
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+ added support for x86_64-android target.
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+ Added the auto-generated list syscalls for mips64-android. It will be needed when mips64 is supported.
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* x86_64-android requires sigreturn for proper signal handling.
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* Register external gas assembler for aarch64-android and x86_64-android.
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* Enabled compilation of the cpu unit for arm-android and x86_64-android.
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* ucnv_open() must be called with some SSE exception masked on x86_64-android.
* Call u_init() during initialization.
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* Create the ".note.gnu.build-id" section for android. It fixes debugging of shared libs in Android Studio.
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* android: Removed cwstring from the uses clause of the unix unit. Use cwstring indirectly. It allows to avoid using cwstring if needed.
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* ICU v3.8 on Android 1.5-2.1 is buggy and can't be unloaded properly.
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* Fixed locale detection on new Android versions.
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* Fixed obtaining a time zone information for 64-bit android.
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* Since Android 8 the net.dnsX properties can't be read. Use Google Public DNS servers.
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* android: Use libc for sockets since the "accept" syscall is blocked by SECCOMP, but the "accept4" alternative is not available on old Android versions (2.3 and older).
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* android: Regenerated syscalls.
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* android: Disabled usage of the "pselect6" and "ppoll" syscalls for arm-android. These syscalls are not available on old Android versions (2.3 or older).
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git-svn-id: branches/fixes_3_2@40540 -
support (64-bit shl and shr are already inlined on i8086, regardless of the
presence of this define). As a side effect, this also improves the code,
generated for 64-bit divisions by power-of-2 constants on i8086.
git-svn-id: trunk@37019 -
per platform (currently only enabled for win32 and win64). Enabling it forces
code page conversion from the codepage of the .msg file to CP_ACP, before
writing the message to the console. Not enabling it keeps the previous
behaviour of not doing any kind of code page conversion for messages. This
feature should be tested and enabled per platform, because it requires code
page conversion support in the rtl (so it may require adding the appropriate
extra units, such as fpwidestring). When this feature is enabled for all
platforms, we can start keeping only one .msg file per language, because
having extra .msg files for different encodings for the same language becomes
redundant, since the compiler can do code page conversion to whatever code
page the console uses.
git-svn-id: trunk@36450 -
* tmoddivnode.first_moddivint does not force a 32 bit helper, the used helper depends now on the resultdef type set by tmoddivnode.pass_typecheck
git-svn-id: trunk@31195 -
instead of the frame pointer register:
1) we exactly know the offsets of the temps from the stack pointer
after pass 1 (based on the require parameter stack size for called
routines), while we don't know it for the frame pointer (it depends
on the number of saved registers)
2) temp offsets from the stack pointer are positive while those from
the frame pointer are negative, and we can directly encode much
bigger positive offsets in the instructions
o move the stack pointer register to a virtual register in
loadparentfpn, because many instructions cannot directly operate
on/with the stack pointer
o add the necessary register interference edges for the stack pointer
register
git-svn-id: trunk@29938 -
Therefor the cpu type (-Cp...) "coldfire" was split up into "isaa", "isaa+", "isab" and "isac". The Linux RTL can currently compiled for "68020", "isab" and "isac". For the other three Bcc.L must be handled differently (only Bcc.B/W supported) and for "68000" also EXT.L needs to be handled differently.
fpcdefs.inc:
+ define CPUCAPABILITIES if capabilities can be set for a certain CPU type (currently ARM, AVR and M68k)
options.pas:
* check for CPUCAPABILITIES instead of specific CPUs
assemble.pas:
- the handling of the CPU type is already done in m68k/ag68kgas.pas, Tm68kGNUAssembler.MakeCmdLine (and thereby already using the gascputypestr array!)
m68k/cpuinfo.pas:
- tcputype: remove "cpu_coldfire"
+ tcputype: add "cpu_isa_a", "cpu_isa_a_p", "cpu_isa_b" and "cpu_isa_c"
+ add "cpu_coldfire" constant which contains all Coldfire specific cpu types
* adjust "cputypestr" and "gascputypestr"
+ add tcpuflags and cpu_capabilities (DBRA restriction was checked with CPUCOLDFIRE, CAS/TAS will be needed for atomic operations and BRAL restriction was discovered during testing of new cpu types)
m68k/cgcpu.pas:
* adjust checks for "cpu_coldfire"
m68k/n68kadd.pas:
* don't use a BRA.L if it is not supported, but (at least for now) a BRA.W
aggas.pas:
* adjusted check for Coldfire
git-svn-id: trunk@25457 -
psub.pas: Use new fpc_compiler_has_fixup_jmps conditional.
mips/aasmcpu.pas: MIPS specific fixup_jmps function,
The insttruction distance calculation is not exact as
some pseudo-instruction can be expanded to a variable number of real instructions
real calculation would only be possible if we first
convert pseudo-instuctions to real instructions before calling fixup_jmps.
ncgutil.pas: Revert commit r21791
ncgcon.pas: Revert commit r21786
mips/cgcpu.pas: Partial revert of commit r21798, no need to always use A_J,
as fixup_jmps now handles out of range branches.
git-svn-id: trunk@21822 -
