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33 Commits

Author SHA1 Message Date
florian
d6e4af8279 + applied remaining patches of Torsten Grundke: adds gather instructions of avx2 
git-svn-id: trunk@29745 -
 2015-02-17 21:43:46 +00:00
florian
842e027a9f + prove of concept how FMA4 could be supported in inline assembler 
git-svn-id: trunk@27214 -
 2014-03-20 21:25:38 +00:00
florian
a79be2b05c + support for FMA instructions in inline assembler 
+ extended avx test code with FMA

git-svn-id: trunk@27209 -
 2014-03-20 20:06:56 +00:00
florian
aa107b914c * merged avx2 branch, developed by Torsten Grundke 
git-svn-id: trunk@27200 -
 2014-03-20 12:03:52 +00:00
florian
7028210817 + tzcnt assembler instruction 
git-svn-id: trunk@26506 -
 2014-01-18 12:11:50 +00:00
nickysn
0f69362edd - rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction, 
using it in inline asm causes an internal error and removing it didn't show
  any regressions after running the testsuite on i386-linux.

git-svn-id: trunk@25827 -
 2013-10-18 23:26:58 +00:00
florian
9b6094a58c + added a few BMI instructions to see if they can be encoded 
git-svn-id: trunk@24907 -
 2013-06-16 09:35:21 +00:00
florian
283ff05127 * merged avx support in inline assembler developed by Torsten Grundke 
git-svn-id: trunk@22568 -
 2012-10-06 19:47:18 +00:00
florian
fc569e224d * handle all operand combinations of xadd, resolves #21146 
git-svn-id: trunk@20177 -
 2012-01-25 21:26:59 +00:00
florian
8308b46a94 + support for assembler instructions with four operands 
+ support for insertq, resolves #19910

git-svn-id: trunk@18206 -
 2011-08-14 16:46:35 +00:00
sergei
0231863fce + Added missing PMULLD instruction, part of Mantis #19910 
git-svn-id: trunk@18106 -
 2011-08-06 06:59:33 +00:00
sergei
354d0520b7 + x86 assembler: fixed MOVABS instruction (it is a x86_64-only subset of MOV with 8-byte immediates/offsets) and same-form encodings of MOV instruction. 
git-svn-id: trunk@17666 -
 2011-06-05 17:32:18 +00:00
sergei
504e0c6816 x86 assembler fixes: 
* mkx86ins.pp: 'regmem' operand type in x86ins.dat must be converted to OT_RM_GPR, not OT_REGMEM. The latter does not restrict register type, allowing to use e.g. xmm registers in place of regular ones. 
* Finished 'movd' and 'movq', added some tests for them to tasm2.pp.

git-svn-id: trunk@17515 -
 2011-05-20 20:39:35 +00:00
sergei
9e8a31193b x86 assembler: 
* Optimized the opcode representation of movq and remaining 3DNow instructions
* Disallow immediates not fitting in 32 bits (Mantis #14685) + test
* Disallow push/pop with 32-bit operands in x86_64 + test

git-svn-id: trunk@17490 -
 2011-05-17 20:06:12 +00:00
sergei
3b979fef6d * Re-commit r17437 after more testing and fixing aasmcpu.pp in r17449. 
git-svn-id: trunk@17452 -
 2011-05-14 11:04:52 +00:00
sergei
b257231203 * Revert r17437, it breaks builds with -O2 and builds on i386 (although -O- on x86_64 is ok). 
git-svn-id: trunk@17439 -
 2011-05-12 23:53:18 +00:00
sergei
1d81a1244b A big update of x86 instruction table, part 1 (mostly SIMD instructions): 
* Using ot_mmxrm and ot_xmmrm operand types to match arguments, reduces number of required entries by half.
* Replaced all literal $66, $F2 and $F3 prefixes with control codes (\361, \334 and \333, respectively).
* Prefix control codes imply writing REX, so code \323 after them is no longer necessary, removed.
* Fixed technology flags (SSSE3, SSE4.1, SSE4.2)
- Removed codes \300 and \301 (intended to generate address size prefix). FPC does not support this feature (the prefix itself is generated, but process_ea rejects operands needing non-default address size). Probably we don't even need to support it. But if we do, a much simpler solution is check all operands, like today's NASM does.
* Fixed/added some instructions along the way, namely CRC32, UNPCKHPD, CMPNEQSD.

git-svn-id: trunk@17437 -
 2011-05-12 19:49:19 +00:00
florian
9279c6955e * support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527 
+ test for aes support

git-svn-id: trunk@17256 -
 2011-04-05 20:22:57 +00:00
florian
49195b0ac0 * fixes assembling of mov ax,<mem16> 
* fixes assembling of test <mem8>,reg8; resolves #11786

git-svn-id: trunk@12040 -
 2008-11-09 10:24:59 +00:00
florian
447276c5bb * Jcc reads the flags, this was not in the dat yet, resolves #9278 
* disabled 4 ops variant of insertq for now

git-svn-id: trunk@8133 -
 2007-07-22 16:40:44 +00:00
florian
0e96eda236 + some sse4 instructions supported, resolves #9046 
git-svn-id: trunk@7613 -
 2007-06-09 19:45:06 +00:00
florian
6118c3e477 * fixed assembling of movd with 64 bit registers 
* fixed passing of floats to c varargs

git-svn-id: trunk@5477 -
 2006-11-25 20:32:32 +00:00
peter
d79df4c74a * 64bit support for shrd 
git-svn-id: trunk@4541 -
 2006-09-03 08:56:10 +00:00
peter
eb725d4e44 Merged revisions 2908,2911,2913-2917 via svnmerge from 
http://svn.freepascal.org/svn/fpc/branches/linker/compiler

........
r2908 | peter | 2006-03-13 13:35:48 +0100 (Mon, 13 Mar 2006) | 2 lines

  * merge trunk upto r2907

........
r2911 | peter | 2006-03-13 18:08:00 +0100 (Mon, 13 Mar 2006) | 2 lines

  * rename values to make room for operand size codes

........
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r2915 | peter | 2006-03-14 13:51:35 +0100 (Tue, 14 Mar 2006) | 2 lines

  * check aktcputype

........
r2916 | peter | 2006-03-14 15:06:32 +0100 (Tue, 14 Mar 2006) | 3 lines

  * merge 300 opcodes
  * more 64bit versions of opcodes

........
r2917 | peter | 2006-03-14 17:34:03 +0100 (Tue, 14 Mar 2006) | 3 lines

  * x86_64 tables
  * convert movq with normal registers to mov

........

git-svn-id: trunk@2931 -
 2006-03-16 08:09:28 +00:00
florian
5ece7cbc2f * first part of x86-64 assembler 
git-svn-id: trunk@2824 -
 2006-03-09 22:05:16 +00:00
florian
db68fb68b4 * updated to nasm 0.98.39 and insns.dat Rev. 1.46 
git-svn-id: trunk@836 -
 2005-08-09 20:15:58 +00:00
daniel
45bcc5b07a * Add support for jmp $0011:$22334455 to Intel asm reader, request from 
a user that is writing an operating system.
  * Fix mkx86ins bug to interpret imm16:imm32 as a single operand

git-svn-id: trunk@606 -
 2005-07-10 07:42:14 +00:00
peter
406eb57a59 * MOVSL fixed 2004-04-08 16:49:42 +00:00
florian
dd2bb53aa5 + possible sse2 unit usage for double calculations 
* some sse2 assembler issues fixed
 2003-12-25 12:01:35 +00:00
Jonas Maebe
16834b1854 * fixed XSTORE instruction info 2003-11-13 18:54:22 +00:00
florian
f495796796 * x86 instruction table updated to nasm 0.98.37: 
- sse3 aka prescott support
      - small fixes
 2003-09-09 12:54:45 +00:00
florian
59abf2555b * types.pas renamed to defbase.pas because D6 contains a types 
unit so this would conflicts if D6 programms are compiled
  + Willamette/SSE2 instructions to assembler added
 2002-07-20 11:57:52 +00:00
peter
a45e77c4a2 * move also the i386*.inc to i386/ 2000-10-15 09:41:37 +00:00