3 Commits

Author	SHA1	Message	Date
pierre	7405ae2758	Fix trv32notnode, by using same code as for riscv64 CPU ... git-svn-id: trunk@43607 -	2019-11-28 22:34:04 +00:00
Jeppe Johansen	a1a17447ff	- Fix bug in 64bit softfloat double negation. ... - Clean up handling of CPU/FPU type handling in RISCV. - Do more fixes to get RISCV32 working. - Fix most soft multiplication handling for generic RISCV code. Still missing a few. - Add RISCV embedded targets. git-svn-id: trunk@42335 -	2019-07-07 11:32:27 +00:00
Jeppe Johansen	ceb38833f2	Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. ... git-svn-id: branches/laksen/riscv_new@39474 -	2018-07-20 08:21:15 +00:00