;
; $Id$
;
; Sparc registers
;
; layout
; <name>,<regtype>,<regnum>,<stdname>,<stabidx>,<ot value>
;
NO,$00,$00,INVALID,-1
; Integer registers
G0,$01,$00,%g0,1
G1,$01,$01,%g1,2
G2,$01,$02,%g2,3
G3,$01,$03,%g3,4
G4,$01,$04,%g4,5
G5,$01,$05,%g5,6
G6,$01,$06,%g6,7
G7,$01,$07,%g7,8
O0,$01,$08,%o0,9
O1,$01,$09,%o1,10
O2,$01,$0a,%o2,11
O3,$01,$0b,%o3,12
O4,$01,$0c,%o4,13
O5,$01,$0d,%o5,14
O6,$01,$0e,%o6,15
O7,$01,$0f,%o7,16
L0,$01,$10,%l0,17
L1,$01,$11,%l1,18
L2,$01,$12,%l2,19
L3,$01,$13,%l3,20
L4,$01,$14,%l4,21
L5,$01,$15,%l5,22
L6,$01,$16,%l6,23
L7,$01,$17,%l7,24
I0,$01,$18,%i0,25
I1,$01,$19,%i1,26
I2,$01,$1a,%i2,27
I3,$01,$1b,%i3,28
I4,$01,$1c,%i4,29
I5,$01,$1d,%i5,30
I6,$01,$1e,%i6,31
I7,$01,$1f,%i7,32
; Float registers
F0,$02,$00,%f0,32
F1,$02,$01,%f1,32
F2,$02,$02,%f2,32
F3,$02,$03,%f3,32
F4,$02,$04,%f4,32
F5,$02,$05,%f5,32
F6,$02,$06,%f6,32
F7,$02,$07,%f7,32
F8,$02,$08,%f8,32
F9,$02,$09,%f9,32
F10,$02,$0a,%f10,32
F11,$02,$0b,%f11,32
F12,$02,$0c,%f12,32
F13,$02,$0d,%f13,32
F14,$02,$0e,%f14,32
F15,$02,$0f,%f15,32
F16,$02,$10,%f16,32
F17,$02,$11,%f17,32
F18,$02,$12,%f18,32
F19,$02,$13,%f19,32
F20,$02,$14,%f20,32
F21,$02,$15,%f21,32
F22,$02,$16,%f22,32
F23,$02,$17,%f23,32
F24,$02,$18,%f24,32
F25,$02,$19,%f25,32
F26,$02,$1a,%f26,32
F27,$02,$1b,%f27,32
F28,$02,$1c,%f28,32
F29,$02,$1d,%f29,32
F30,$02,$1e,%f30,32
F31,$02,$1f,%f31,32

; Coprocessor registers
C0,$03,$00,%c0,32
C1,$03,$01,%c1,32
C2,$03,$02,%c2,32
C3,$03,$03,%c3,32
C4,$03,$04,%c4,32
C5,$03,$05,%c5,32
C6,$03,$06,%c6,32
C7,$03,$07,%c7,32
C8,$03,$08,%c8,32
C9,$03,$09,%c9,32
C10,$03,$0a,%c10,32
C11,$03,$0b,%c11,32
C12,$03,$0c,%c12,32
C13,$03,$0d,%c13,32
C14,$03,$0e,%c14,32
C15,$03,$0f,%c15,32
C16,$03,$10,%c16,32
C17,$03,$11,%c17,32
C18,$03,$12,%c18,32
C19,$03,$13,%c19,32
C20,$03,$14,%c20,32
C21,$03,$15,%c21,32
C22,$03,$16,%c22,32
C23,$03,$17,%c23,32
C24,$03,$18,%c24,32
C25,$03,$19,%c25,32
C26,$03,$1a,%c26,32
C27,$03,$1b,%c27,32
C28,$03,$1c,%c28,32
C29,$03,$1d,%c29,32
C30,$03,$1e,%c30,32
C31,$03,$1f,%c31,32

; Special registers
FSR,$05,$00,%fsr,64
FQ,$05,$01,%fq,65
CSR,$05,$02,%csr,64
CQ,$05,$03,%cq,65
PSR,$05,$04,%psr,64
TBR,$05,$05,%tbr,64
WIM,$05,$06,%wim,64
Y,$05,$07,%y,64

; Ancillary State Registers
ASR0,$04,$00,%asr0,32
ASR1,$04,$01,%asr1,32
ASR2,$04,$02,%asr2,32
ASR3,$04,$03,%asr3,32
ASR4,$04,$04,%asr4,32
ASR5,$04,$05,%asr5,32
ASR6,$04,$06,%asr6,32
ASR7,$04,$07,%asr7,32
ASR8,$04,$08,%asr8,32
ASR9,$04,$09,%asr9,32
ASR10,$04,$0a,%asr10,32
ASR11,$04,$0b,%asr11,32
ASR12,$04,$0c,%asr12,32
ASR13,$04,$0d,%asr13,32
ASR14,$04,$0e,%asr14,32
ASR15,$04,$0f,%asr15,32
ASR16,$04,$10,%asr16,32
ASR17,$04,$11,%asr17,32
ASR18,$04,$12,%asr18,32
ASR19,$04,$13,%asr19,32
ASR20,$04,$14,%asr20,32
ASR21,$04,$15,%asr21,32
ASR22,$04,$16,%asr22,32
ASR23,$04,$17,%asr23,32
ASR24,$04,$18,%asr24,32
ASR25,$04,$19,%asr25,32
ASR26,$04,$1a,%asr26,32
ASR27,$04,$1b,%asr27,32
ASR28,$04,$1c,%asr28,32
ASR29,$04,$1d,%asr29,32
ASR30,$04,$1e,%asr30,32
ASR31,$04,$1f,%asr31,32

;
; $Log$
; Revision 1.3  2003-09-03 16:29:37  peter
;   * superregisters also from .dat file
;
; Revision 1.2  2003/09/03 15:55:01  peter
;   * NEWRA branch merged
;
; Revision 1.1.2.2  2003/09/02 17:49:17  peter
;   * newra updates
;
; Revision 1.1.2.1  2003/08/31 21:08:16  peter
;   * first batch of sparc fixes
;
;