{ $Id$ Copyright (c) 1998-2002 by Florian Klaempfl Generate SPARC assembler for type converting nodes This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ****************************************************************************} unit ncpucnv; {$i fpcdefs.inc} interface uses node,ncnv,ncgcnv,defcmp; type TSparcTypeConvNode = class(TCgTypeConvNode) protected { procedure second_int_to_int;override; } { procedure second_string_to_string;override; } { procedure second_cstring_to_pchar;override; } { procedure second_string_to_chararray;override; } { procedure second_array_to_pointer;override; } function first_int_to_real: tnode; override; { procedure second_pointer_to_array;override; } { procedure second_chararray_to_string;override; } { procedure second_char_to_string;override; } procedure second_int_to_real;override; procedure second_real_to_real;override; { procedure second_cord_to_pointer;override; } { procedure second_proc_to_procvar;override; } { procedure second_bool_to_int;override; } procedure second_int_to_bool;override; { procedure second_load_smallset;override; } { procedure second_ansistring_to_pchar;override; } { procedure second_pchar_to_string;override; } { procedure second_class_to_intf;override; } { procedure second_char_to_char;override; } end; implementation uses verbose,globals,systems, symconst,symdef,aasmbase,aasmtai, defutil, cgbase,pass_1,pass_2, ncon,ncal, ncgutil, cpubase,aasmcpu, tgobj,cgobj; {***************************************************************************** FirstTypeConv *****************************************************************************} function TSparctypeconvnode.first_int_to_real: tnode; var fname: string[19]; begin { converting a 64bit integer to a float requires a helper } if is_64bitint(left.resulttype.def) then begin if is_signed(left.resulttype.def) then fname := 'fpc_int64_to_double' else fname := 'fpc_qword_to_double'; result := ccallnode.createintern(fname,ccallparanode.create( left,nil)); left:=nil; firstpass(result); exit; end else { other integers are supposed to be 32 bit } begin if is_signed(left.resulttype.def) then inserttypeconv(left,s32inttype) else inserttypeconv(left,u32inttype); firstpass(left); end; result := nil; if registersfpu<1 then registersfpu:=1; expectloc:=LOC_FPUREGISTER; end; {***************************************************************************** SecondTypeConv *****************************************************************************} procedure TSparctypeconvnode.second_int_to_real; begin location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def)); location_force_mem(exprasmlist,left.location); location.register:=cg.getfpuregister(exprasmlist,location.size); { Load memory in fpu register } cg.a_loadfpu_ref_reg(exprasmlist,location.size,left.location.reference,location.register); tg.ungetiftemp(exprasmlist,left.location.reference); {$warning TODO Handle also double} { Convert value in fpu register from integer to float } exprasmlist.concat(taicpu.op_reg_reg(A_FiTOs,location.register,location.register)); end; procedure TSparctypeconvnode.second_real_to_real; const conv_op : array[tfloattype,tfloattype] of tasmop = ( { from: s32 s64 s80 c64 cur f128 } { s32 } ( A_FMOVS,A_FDTOS,A_NONE, A_NONE, A_NONE, A_NONE ), { s64 } ( A_FSTOD,A_FMOVD,A_NONE, A_NONE, A_NONE, A_NONE ), { s80 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ), { c64 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ), { cur } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ), { f128 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ) ); var op : tasmop; begin location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def)); location_force_fpureg(exprasmlist,left.location,false); { Convert value in fpu register from integer to float } op:=conv_op[tfloatdef(resulttype.def).typ,tfloatdef(left.resulttype.def).typ]; if op=A_NONE then internalerror(200401121); location_release(exprasmlist,left.location); location.register:=cg.getfpuregister(exprasmlist,location.size); exprasmlist.concat(taicpu.op_reg_reg(A_FsTOd,left.location.register,location.register)); end; procedure TSparctypeconvnode.second_int_to_bool; var hreg1,hreg2 : tregister; resflags : tresflags; opsize : tcgsize; hlabel,oldtruelabel,oldfalselabel : tasmlabel; begin oldtruelabel:=truelabel; oldfalselabel:=falselabel; objectlibrary.getlabel(truelabel); objectlibrary.getlabel(falselabel); secondpass(left); if codegenerror then exit; { byte(boolean) or word(wordbool) or longint(longbool) must } { be accepted for var parameters } if (nf_explicit in flags)and (left.resulttype.def.size=resulttype.def.size)and (left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then begin location_copy(location,left.location); truelabel:=oldtruelabel; falselabel:=oldfalselabel; exit; end; location_reset(location,LOC_REGISTER,def_cgsize(left.resulttype.def)); opsize := def_cgsize(left.resulttype.def); case left.location.loc of LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER: begin if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then begin reference_release(exprasmlist,left.location.reference); hreg2:=cg.GetIntRegister(exprasmlist,opsize); cg.a_load_ref_reg(exprasmlist,OpSize,OpSize,left.location.reference,hreg2); end else hreg2 := left.location.register; hreg1 := cg.GetIntRegister(exprasmlist,opsize); exprasmlist.concat(taicpu.op_reg_const_reg(A_SUB,hreg1,1,hreg2)); exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUB,hreg1,hreg1,hreg2)); cg.UnGetRegister(exprasmlist,hreg2); end; LOC_FLAGS : begin hreg1:=cg.GetIntRegister(exprasmlist,location.size); resflags:=left.location.resflags; cg.g_flags2reg(exprasmlist,location.size,resflags,hreg1); end; LOC_JUMP : begin hreg1:=cg.getintregister(exprasmlist,OS_INT); objectlibrary.getlabel(hlabel); cg.a_label(exprasmlist,truelabel); cg.a_load_const_reg(exprasmlist,OS_INT,1,hreg1); cg.a_jmp_always(exprasmlist,hlabel); cg.a_label(exprasmlist,falselabel); cg.a_load_const_reg(exprasmlist,OS_INT,0,hreg1); cg.a_label(exprasmlist,hlabel); end; else internalerror(10062); end; with Location do begin location.register := hreg1; if Size in [OS_64, OS_S64] then RegisterHigh:=Tregister(LongInt(hReg1)+1);{Alrady allocated OS_64} end; truelabel:=oldtruelabel; falselabel:=oldfalselabel; end; begin ctypeconvnode:=TSparctypeconvnode; end. { $Log$ Revision 1.26 2004-06-20 08:55:32 florian * logs truncated Revision 1.25 2004/06/16 20:07:10 florian * dwarf branch merged Revision 1.24.2.1 2004/05/31 16:39:42 peter * add ungetiftemp in a few locations Revision 1.24 2004/03/15 14:37:06 mazen + support for LongBool(Int64) type cast Revision 1.23 2004/02/03 22:32:54 peter * renamed xNNbittype to xNNinttype * renamed registers32 to registersint * replace some s32bit,u32bit with torddef([su]inttype).def.typ Revision 1.22 2004/01/12 22:11:39 peter * use localalign info for alignment for locals and temps * sparc fpu flags branching added * moved powerpc copy_valye_openarray to generic }