fpc/compiler/arm/rarmsri.inc
Jeppe Johansen 387824c1ee Added some APSR register bitmask definitions.
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
2014-12-12 22:23:44 +00:00

133 lines
599 B
SQL

{ don't edit, this file is generated from armreg.dat }
0,
110,
129,
92,
128,
130,
120,
121,
123,
89,
93,
94,
103,
104,
105,
106,
107,
108,
95,
96,
97,
98,
99,
100,
101,
102,
27,
30,
57,
60,
63,
66,
69,
72,
73,
74,
75,
76,
33,
77,
78,
79,
80,
81,
82,
83,
84,
85,
86,
36,
87,
88,
39,
42,
45,
48,
51,
54,
115,
112,
17,
18,
19,
20,
21,
22,
23,
24,
122,
127,
90,
124,
114,
113,
111,
117,
126,
125,
109,
119,
118,
116,
1,
2,
11,
12,
13,
14,
15,
16,
3,
4,
5,
6,
7,
8,
9,
10,
25,
26,
40,
41,
43,
44,
46,
47,
49,
50,
52,
53,
28,
55,
56,
58,
59,
61,
62,
64,
65,
67,
68,
29,
70,
71,
31,
32,
34,
35,
37,
38,
91