fpc/compiler/arm/rarmstd.inc
Jeppe Johansen 387824c1ee Added some APSR register bitmask definitions.
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
2014-12-12 22:23:44 +00:00

133 lines
1014 B
PHP

{ don't edit, this file is generated from armreg.dat }
'INVALID',
'r0',
'r1',
'r2',
'r3',
'r4',
'r5',
'r6',
'r7',
'r8',
'r9',
'r10',
'r11',
'r12',
'r13',
'r14',
'r15',
'f0',
'f1',
'f2',
'f3',
'f4',
'f5',
'f6',
'f7',
's0',
's1',
'd0',
's2',
's3',
'd1',
's4',
's5',
'd2',
's6',
's7',
'd3',
's8',
's9',
'd4',
's10',
's11',
'd5',
's12',
's13',
'd6',
's14',
's15',
'd7',
's16',
's17',
'd8',
's18',
's19',
'd9',
's20',
's21',
'd10',
's22',
's23',
'd11',
's24',
's25',
'd12',
's26',
's27',
'd13',
's28',
's29',
'd14',
's30',
's31',
'd15',
'd16',
'd17',
'd18',
'd19',
'd20',
'd21',
'd22',
'd23',
'd24',
'd25',
'd26',
'd27',
'd28',
'd29',
'd30',
'd31',
'cpsr',
'fpscr',
'spsr',
'apsr_nzcv',
'cr0',
'cr1',
'cr2',
'cr3',
'cr4',
'cr5',
'cr6',
'cr7',
'cr8',
'cr9',
'cr10',
'cr11',
'cr12',
'cr13',
'cr14',
'cr15',
'p15',
'apsr',
'ipsr',
'epsr',
'iepsr',
'iapsr',
'eapsr',
'psr',
'msp',
'psp',
'primask',
'basepri',
'basepri_max',
'faultmask',
'control',
'fpsid',
'mvfr1',
'mvfr0',
'fpexc',
'apsr_nzcvq',
'apsr_g',
'apsr_nzcvqg'